Searched refs:SPI1 (Results 1 – 25 of 39) sorted by relevance
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14 /* Setup A has SPI1 flash as a boot device, while setup B uses NAND flash.15 * Since CP0 SPI1 and CP0 NAND are sharing some pins, they cannot be activated
15 * Since CP0 SPI1 and CP0 NAND are sharing some pins, they cannot be activated16 * simultaneously. When NAND controller is enabled, SPI1 should be disabled.
433 * [13] CP1 SPI1 MISO (TDM and SPI ROM shared)434 * [14] CP1 SPI1 CS0n (64Mb SPI ROM)435 * [15] CP1 SPI1 MOSI (TDM and SPI ROM shared)436 * [16] CP1 SPI1 CLK (TDM and SPI ROM shared)
110 /* SPI1: Apalis SPI1 */
107 /* SPI1: Apalis SPI1 */
105 /* SPI1: Apalis SPI1 */
111 /* SPI1: Apalis SPI1 */
102 label = "HS-SPI1";
222 /* SPI1 CS0 */224 /* SPI1 CS1 */
651 function = "SPI1";916 function = "SPI1";917 groups = "SPI1";
82 /* SPI1: Colibri SSP */
215 MX27_PAD_CSPI1_SS0__GPIO4_28 0x0 /* SPI1 CS0 */
63 * I: TI TSC2046 touchscreen controller (on SPI1)
128 /* Apalis SPI1 */536 /* SPI1 cs */
83 * Note: spid and spie optionally used for SPI1397 * SPI1 (Optional)
1289 function = "SPI1";1290 groups = "SPI1";
346 SPI0, SPI1, enumerator381 INTC_VECT(SPI0, 0x960), INTC_VECT(SPI1, 0x980),413 INTC_GROUP(SPI, SPI0, SPI1),
800 SPI0, SPI1, enumerator862 INTC_VECT(SPI1, 0x8c0),975 ARC4, 0, SPI1, JMC, 0, 0, 0, DVC1070 { INT2PRI9, 0, 32, 8, { ARC4, 0, SPI1, JMC } },
138 /* On High speed expansion (HS-SPI1) */
286 label = "HS-SPI1";
396 /* On Pi-2 connector (labeled for SPI1), RTS/CTS optional */