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Searched refs:SPR_DMR1_CW3_AND (Results 1 – 1 of 1) sorted by relevance

/arch/openrisc/include/asm/
Dspr_defs.h426 #define SPR_DMR1_CW3_AND 0x00000040 macro
428 #define SPR_DMR1_CW3 (SPR_DMR1_CW3_AND | SPR_DMR1_CW3_OR)