| /arch/arm/lib/ |
| D | findbit.S | 27 THUMB( lsr r3, r2, #3 )
28 THUMB( ldrb r3, [r0, r3] )
48 THUMB( lsr r3, r2, #3 )
49 THUMB( ldrb r3, [r0, r3] )
68 THUMB( lsr r3, r2, #3 )
69 THUMB( ldrb r3, [r0, r3] )
89 THUMB( lsr r3, r2, #3 )
90 THUMB( ldrb r3, [r0, r3] )
106 THUMB( lsr r3, #3 )
107 THUMB( ldrb r3, [r0, r3] )
[all …]
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| D | ashrdi3.S | 48 THUMB( lslmi r3, ah, ip )
49 THUMB( orrmi al, al, r3 )
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| D | lshrdi3.S | 48 THUMB( lslmi r3, ah, ip )
49 THUMB( orrmi al, al, r3 )
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| D | ashldi3.S | 48 THUMB( lsrmi r3, al, ip )
49 THUMB( orrmi ah, ah, r3 )
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| D | io-writesw-armv4.S | 76 THUMB( rsb r3, r3, #0 )
77 THUMB( ldr r3, [r1, r3] )
78 THUMB( sub r1, r3 )
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| D | backtrace.S | 36 THUMB( moveq mask, #0xfc000000 )
37 THUMB( orreq mask, #0x03 )
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| D | div64.S | 181 THUMB( lsl xh, xh, ip )
182 THUMB( orr yl, yl, xh )
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| /arch/arm/kernel/ |
| D | sleep.S | 42 THUMB( lsr \dst, \dst, \rs0 )
45 THUMB( lsr \mask, \mask, \rs1 )
46 THUMB( orr \dst, \dst, \mask )
49 THUMB( lsr \mask, \mask, \rs2 )
50 THUMB( orr \dst, \dst, \mask )
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| D | head-common.S | 88 THUMB( ldr sp, [r4] )
89 THUMB( add r4, #4 )
95 THUMB( ldmia r4!, {r0, r1, r2, r3} )
96 THUMB( mov sp, r3 )
102 THUMB( ldmia r4!, {r0, r1, r3} )
103 THUMB( mov sp, r3 )
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| D | entry-armv.S | 91 THUMB( stmia sp, {r0 - r12} )
92 THUMB( str sp, [sp, #S_SP] )
93 THUMB( str lr, [sp, #S_LR] )
197 THUMB( ldr r5, [sp, #S_PSR] ) @ potentially updated CPSR
257 THUMB( tst r5, #PSR_T_BIT ) @ exception taken in Thumb mode?
258 THUMB( movne r1, #2 ) @ if so, fix up PC correction
311 THUMB( mov r0, #ABT_MODE | PSR_I_BIT | PSR_F_BIT )
312 THUMB( msr cpsr_c, r0 )
316 THUMB( mov r0, #SVC_MODE | PSR_I_BIT | PSR_F_BIT )
317 THUMB( msr cpsr_c, r0 )
[all …]
|
| D | debug.S | 132 THUMB( bkpt #0xab )
134 THUMB( svc #0xab )
147 THUMB( bkpt #0xab )
149 THUMB( svc #0xab )
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| D | head.S | 96 THUMB( badr r9, 1f ) @ Kernel is always entered in ARM.
97 THUMB( bx r9 ) @ If this is a Thumb-2 kernel,
98 THUMB( .thumb ) @ switch to Thumb now.
99 THUMB(1: )
110 THUMB( it eq ) @ force fixup-able long branch encoding
117 THUMB( it lo ) @ force fixup-able long branch encoding
380 THUMB( badr r9, 1f ) @ Kernel is entered in ARM.
381 THUMB( bx r9 ) @ If this is a Thumb-2 kernel,
382 THUMB( .thumb ) @ switch to Thumb now.
383 THUMB(1: )
[all …]
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| D | relocate_kernel.S | 67 THUMB( bx lr )
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| D | head-nommu.S | 46 THUMB( badr r9, 1f ) @ Kernel is always entered in ARM.
47 THUMB( bx r9 ) @ If this is a Thumb-2 kernel,
48 THUMB( .thumb ) @ switch to Thumb now.
49 THUMB(1: )
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| D | entry-common.S | 190 THUMB( mov r8, sp )
191 THUMB( store_user_sp_lr r8, r10, S_SP ) @ calling sp, lr
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| /arch/arm/include/asm/ |
| D | unified.h | 31 #define THUMB(x...) x macro
44 #define THUMB(x...)
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| D | assembler.h | 217 THUMB( mov \rd, sp )
218 THUMB( lsr \rd, \rd, #THREAD_SIZE_ORDER + PAGE_SHIFT )
378 THUMB( orr \reg , \reg , #PSR_T_BIT )
535 THUMB( ittt \c )
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| D | uaccess.h | 462 THUMB( "1: str" __t " " __reg_oper1 ", [%1]\n" ) \
463 THUMB( "2: str" __t " " __reg_oper0 ", [%1, #4]\n" ) \
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| /arch/arm/boot/compressed/ |
| D | debug.S | 31 THUMB( bkpt #0xab )
33 THUMB( svc #0xab )
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| D | head.S | 151 THUMB( isb )
247 THUMB( svc 0xab ) @ angel_SWI_THUMB
976 THUMB( addeq r12, r3 )
977 THUMB( moveq pc, r12 ) @ call cache function
1001 THUMB( nop )
1003 THUMB( nop )
1005 THUMB( nop )
1010 THUMB( nop )
1012 THUMB( nop )
1014 THUMB( nop )
[all …]
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| /arch/arm/mm/ |
| D | alignment.c | 199 THUMB( "1: "ins" %1, [%2]\n" ) \
200 THUMB( " add %2, %2, #1\n" ) \
257 THUMB( "1: "ins" %1, [%2]\n" ) \
258 THUMB( " add %2, %2, #1\n" ) \
289 THUMB( "1: "ins" %1, [%2]\n" ) \
290 THUMB( " add %2, %2, #1\n" ) \
293 THUMB( "2: "ins" %1, [%2]\n" ) \
294 THUMB( " add %2, %2, #1\n" ) \
297 THUMB( "3: "ins" %1, [%2]\n" ) \
298 THUMB( " add %2, %2, #1\n" ) \
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| D | cache-v7.S | 158 THUMB( lsl r6, r4, r5 )
159 THUMB( orr r11, r10, r6 ) @ factor way and cache number into r11
161 THUMB( lsl r6, r9, r2 )
162 THUMB( orr r11, r11, r6 ) @ factor index number into r11
196 THUMB( stmfd sp!, {r4-r7, r9-r11, lr} )
202 THUMB( ldmfd sp!, {r4-r7, r9-r11, lr} )
214 THUMB( stmfd sp!, {r4-r7, r9-r11, lr} )
220 THUMB( ldmfd sp!, {r4-r7, r9-r11, lr} )
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| D | proc-v7-2level.S | 101 THUMB( add r0, r0, #2048 )
102 THUMB( str r3, [r0] )
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| /arch/arm/common/ |
| D | mcpm_head.S | 48 THUMB( badr r12, 1f )
49 THUMB( bx r12 )
50 THUMB( .thumb )
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| /arch/arm/mach-tegra/ |
| D | reset-handler.S | 39 THUMB( it ne )
200 THUMB( add lr, lr, #1 ) @ switch to Thumb mode
|