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Searched refs:UART1_REG (Results 1 – 3 of 3) sorted by relevance

/arch/arm/mach-orion5x/
Dtsx09-common.c22 #define UART1_REG(x) (UART1_VIRT_BASE + ((UART_##x) << 2)) macro
32 writel(0x83, UART1_REG(LCR)); in qnap_tsx09_power_off()
33 writel(divisor & 0xff, UART1_REG(DLL)); in qnap_tsx09_power_off()
34 writel((divisor >> 8) & 0xff, UART1_REG(DLM)); in qnap_tsx09_power_off()
35 writel(0x03, UART1_REG(LCR)); in qnap_tsx09_power_off()
36 writel(0x00, UART1_REG(IER)); in qnap_tsx09_power_off()
37 writel(0x00, UART1_REG(FCR)); in qnap_tsx09_power_off()
38 writel(0x00, UART1_REG(MCR)); in qnap_tsx09_power_off()
41 writel('A', UART1_REG(TX)); in qnap_tsx09_power_off()
Dterastation_pro2-setup.c159 #define UART1_REG(x) (UART1_VIRT_BASE + ((UART_##x) << 2)) macro
169 while (!(readl(UART1_REG(LSR)) & UART_LSR_DR)) { in tsp2_miconread()
177 buf[i] = readl(UART1_REG(RX)); in tsp2_miconread()
189 while (!(readl(UART1_REG(LSR)) & UART_LSR_THRE)) in tsp2_miconwrite()
191 writel(buf[i++], UART1_REG(TX)); in tsp2_miconwrite()
275 writel(0x83, UART1_REG(LCR)); in tsp2_power_off()
276 writel(divisor & 0xff, UART1_REG(DLL)); in tsp2_power_off()
277 writel((divisor >> 8) & 0xff, UART1_REG(DLM)); in tsp2_power_off()
278 writel(0x1b, UART1_REG(LCR)); in tsp2_power_off()
279 writel(0x00, UART1_REG(IER)); in tsp2_power_off()
[all …]
Dkurobox_pro-setup.c181 #define UART1_REG(x) (UART1_VIRT_BASE + ((UART_##x) << 2)) macro
191 while (!(readl(UART1_REG(LSR)) & UART_LSR_DR)) { in kurobox_pro_miconread()
199 buf[i] = readl(UART1_REG(RX)); in kurobox_pro_miconread()
211 while (!(readl(UART1_REG(LSR)) & UART_LSR_THRE)) in kurobox_pro_miconwrite()
213 writel(buf[i++], UART1_REG(TX)); in kurobox_pro_miconwrite()
297 writel(0x83, UART1_REG(LCR)); in kurobox_pro_power_off()
298 writel(divisor & 0xff, UART1_REG(DLL)); in kurobox_pro_power_off()
299 writel((divisor >> 8) & 0xff, UART1_REG(DLM)); in kurobox_pro_power_off()
300 writel(0x1b, UART1_REG(LCR)); in kurobox_pro_power_off()
301 writel(0x00, UART1_REG(IER)); in kurobox_pro_power_off()
[all …]