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Searched refs:UINT64_CAST (Results 1 – 6 of 6) sorted by relevance

/arch/mips/include/asm/sn/sn0/
Dhubni.h75 #define NSRI_8BITMODE_MASK (UINT64_CAST 0x1 << 30)
77 #define NSRI_LINKUP_MASK (UINT64_CAST 0x1 << 29)
79 #define NSRI_DOWNREASON_MASK (UINT64_CAST 0x1 << 28) /* out of reset. */
81 #define NSRI_MORENODES_MASK (UINT64_CAST 1 << 18) /* Max. # of nodes */
85 #define NSRI_REGIONSIZE_MASK (UINT64_CAST 1 << 17) /* Granularity */
89 #define NSRI_NODEID_MASK (UINT64_CAST 0x1ff << 8)/* Node (Hub) ID */
91 #define NSRI_REV_MASK (UINT64_CAST 0xf << 4) /* Chip Revision */
93 #define NSRI_CHIPID_MASK (UINT64_CAST 0xf) /* Chip type ID */
104 #define NPR_PORTRESET (UINT64_CAST 1 << 7) /* Send warm reset */
105 #define NPR_LINKRESET (UINT64_CAST 1 << 1) /* Send link reset */
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Dhubmd.h125 #define MMC_FPROM_CYC_MASK (UINT64_CAST 31 << 49) /* of 'L' suffix, */
127 #define MMC_FPROM_WR_MASK (UINT64_CAST 31 << 44)
129 #define MMC_UCTLR_CYC_MASK (UINT64_CAST 31 << 39)
131 #define MMC_UCTLR_WR_MASK (UINT64_CAST 31 << 34)
133 #define MMC_DIMM0_SEL_MASK (UINT64_CAST 3 << 32)
135 #define MMC_IO_PROT_EN_MASK (UINT64_CAST 1 << 31)
136 #define MMC_IO_PROT (UINT64_CAST 1 << 31)
138 #define MMC_ARB_MLSS_MASK (UINT64_CAST 1 << 30)
139 #define MMC_ARB_MLSS (UINT64_CAST 1 << 30)
141 #define MMC_IGNORE_ECC_MASK (UINT64_CAST 1 << 29)
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Daddrs.h62 #define BDDIR_UPPER_MASK (UINT64_CAST 0x7ffff << 10)
63 #define BDECC_UPPER_MASK (UINT64_CAST 0x3ffffff << 3)
76 #define BDDIR_UPPER_MASK (UINT64_CAST 0xfffff << 10)
77 #define BDECC_UPPER_MASK (UINT64_CAST 0x7ffffff << 3)
81 #define NODE_ADDRSPACE_SIZE (UINT64_CAST 1 << NODE_SIZE_BITS)
83 #define NASID_MASK (UINT64_CAST NASID_BITMASK << NASID_SHFT)
84 #define NASID_GET(_pa) (int) ((UINT64_CAST (_pa) >> \
94 (NODE_IO_BASE(nasid) + (UINT64_CAST(widget) << SWIN_SIZE_BITS))
104 #define BWIN_SIZE (UINT64_CAST 1 << BWIN_SIZE_BITS)
109 (UINT64_CAST(bigwin) << BWIN_SIZE_BITS))
Dhubpi.h386 #define PRLC_USE_INT_MASK (UINT64_CAST 1 << 16)
387 #define PRLC_USE_INT (UINT64_CAST 1 << 16)
389 #define PRLC_GCLK_MASK (UINT64_CAST 1 << 15)
390 #define PRLC_GCLK (UINT64_CAST 1 << 15)
392 #define PRLC_GCLK_COUNT_MASK (UINT64_CAST 0x7f << 8)
394 #define PRLC_MAX_COUNT_MASK (UINT64_CAST 0x7f << 1)
396 #define PRLC_GCLK_EN_MASK (UINT64_CAST 1)
397 #define PRLC_GCLK_EN (UINT64_CAST 1)
Dhubio.h961 #define IIO_WST_ERROR_MASK (UINT64_CAST 1 << 32) /* Widget status error */
/arch/mips/include/asm/sn/
Daddrs.h30 #define UINT64_CAST (unsigned long) macro
34 #define UINT64_CAST macro
46 #define TO_NODE_ADDRSPACE(_pa) (UINT64_CAST (_pa) & NODE_ADDRSPACE_MASK)
49 ((UINT64_CAST(_pa) & ~NASID_MASK) | \
50 (UINT64_CAST(_nasid) << NASID_SHFT))
58 #define NODE_OFFSET(_n) (UINT64_CAST (_n) << NODE_SIZE_BITS)
74 (NODE_IO_BASE(nasid) + (UINT64_CAST(widget) << SWIN_SIZE_BITS))
85 #define SWIN_SIZE (UINT64_CAST 1 << 24)
191 UINT64_CAST(_pa) & NASID_MASK | \
192 UINT64_CAST(_pa) >> 2 & BDDIR_UPPER_MASK | \
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