/arch/powerpc/include/asm/ |
D | opal-api.h | 469 __be64 params[8]; 523 __be64 physical_address_start; 524 __be64 physical_address_end; 530 __be64 physical_address_start; 531 __be64 physical_address_end; 621 __be64 hmer; 623 __be64 tfmr; 666 __be64 gemXfir; 667 __be64 gemRfir; 668 __be64 gemRirqfir; [all …]
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D | pgtable-be-types.h | 8 typedef struct { __be64 pte; } pte_t; 16 static inline __be64 pte_raw(pte_t x) in pte_raw() 23 typedef struct { __be64 pmd; } pmd_t; 31 static inline __be64 pmd_raw(pmd_t x) in pmd_raw() 37 typedef struct { __be64 pud; } pud_t; 45 static inline __be64 pud_raw(pud_t x) in pud_raw() 53 typedef struct { __be64 pgd; } pgd_t; 61 static inline __be64 pgd_raw(pgd_t x) in pgd_raw() 84 __be64 prev; in pte_xchg() 87 prev = (__force __be64)__cmpxchg_u64(p, (__force unsigned long)pte_raw(old), in pte_xchg() [all …]
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D | lppaca.h | 88 __be64 wait_state_cycles; /* Wait cycles for this proc */ 106 volatile __be64 cmo_faults; /* CMO page fault count */ 107 volatile __be64 cmo_fault_time; /* CMO page fault time */ 114 volatile __be64 dtl_idx; /* Dispatch Trace Log head index */ 152 __be64 reserved; 154 __be64 esid; 155 __be64 vsid;
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D | icswx.h | 37 __be64 value; 38 __be64 address; 92 __be64 address; 110 __be64 address; 118 __be64 fault_storage_addr; 144 __be64 csb_addr; 187 __be64 ccw_reg = ccw; in icswx()
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D | opal.h | 40 int64_t opal_console_write(int64_t term_number, __be64 *length, 42 int64_t opal_console_read(int64_t term_number, __be64 *length, 45 __be64 *length); 48 __be64 *hour_minute_second_millisecond); 59 int64_t opal_handle_interrupt(uint64_t isn, __be64 *outstanding_event_mask); 60 int64_t opal_poll_events(__be64 *outstanding_event_mask); 85 __be64 *phb_status); 132 __be64 *msi_address, __be32 *message_data); 155 int64_t opal_get_dpo_status(__be64 *dpo_timeout); 157 int64_t opal_pci_next_error(uint64_t phb_id, __be64 *first_frozen_pe, [all …]
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D | dtl.h | 17 __be64 timebase; 18 __be64 fault_addr; 19 __be64 srr0; 20 __be64 srr1;
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D | vas.h | 248 __be64 descriptor; 249 __be64 feat_type;
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/arch/powerpc/platforms/pseries/ |
D | rtas-fadump.h | 37 __be64 source_address; 38 __be64 source_len; 39 __be64 bytes_dumped; 40 __be64 destination_address; 52 __be64 dd_block_offset; 53 __be64 dd_num_blocks; 92 __be64 magic_number; 99 __be64 reg_id; 100 __be64 reg_value;
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D | vas.h | 47 __be64 descriptor; 100 __be64 win_addr; /* Paste address */ 105 __be64 domain[6]; 106 __be64 win_util; /* Number of bytes processed */
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D | ras.c | 71 __be64 effective_address; 72 __be64 logical_address; 403 static __be64 *fwnmi_get_savep(struct pt_regs *regs) in fwnmi_get_savep() 435 __be64 *savep; in fwnmi_get_errinfo() 490 regs_set_return_ip(regs, be64_to_cpu((__be64)regs->nip)); in pSeries_system_reset_exception() 496 __be64 *savep; in pSeries_system_reset_exception()
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/arch/powerpc/platforms/powernv/ |
D | pci-ioda-tce.c | 62 static __be64 *pnv_alloc_tce_level(int nid, unsigned int shift) in pnv_alloc_tce_level() 65 __be64 *addr; in pnv_alloc_tce_level() 80 static void pnv_pci_ioda2_table_do_free_pages(__be64 *addr, 83 static __be64 *pnv_tce(struct iommu_table *tbl, bool user, long idx, bool alloc) in pnv_tce() 85 __be64 *tmp = user ? tbl->it_userspace : (__be64 *) tbl->it_base; in pnv_tce() 95 __be64 *tmp2; in pnv_tce() 154 __be64 *ptce = NULL; in pnv_tce_xchg() 182 __be64 *pnv_tce_useraddrptr(struct iommu_table *tbl, long index, bool alloc) in pnv_tce_useraddrptr() 197 __be64 *ptce = pnv_tce(tbl, false, idx, false); in pnv_tce_free() 209 __be64 *ptce = pnv_tce(tbl, false, index - tbl->it_offset, false); in pnv_tce_get() [all …]
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D | opal-msglog.c | 19 __be64 magic; 21 __be64 obuf_phys; 22 __be64 ibuf_phys;
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D | opal-fadump.h | 41 __be64 fadumphdr_addr; 83 __be64 reg_val;
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/arch/powerpc/include/asm/book3s/64/ |
D | mmu.h | 39 __be64 prtb0; 40 __be64 prtb1; 45 __be64 patb0; 46 __be64 patb1;
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D | hash.h | 156 __be64 old_be, tmp_be; in hash__pte_update() 187 __be64 old, tmp, val, mask; in hash__ptep_set_access_flags()
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/arch/powerpc/kvm/ |
D | book3s_pr_papr.c | 40 __be64 pteg[2 * 8]; in kvmppc_h_pr_enter() 41 __be64 *hpte; in kvmppc_h_pr_enter() 100 pte[0] = be64_to_cpu((__force __be64)pte[0]); in kvmppc_h_pr_remove() 101 pte[1] = be64_to_cpu((__force __be64)pte[1]); in kvmppc_h_pr_remove() 183 pte[0] = be64_to_cpu((__force __be64)pte[0]); in kvmppc_h_pr_bulk_remove() 184 pte[1] = be64_to_cpu((__force __be64)pte[1]); in kvmppc_h_pr_bulk_remove() 228 pte[0] = be64_to_cpu((__force __be64)pte[0]); in kvmppc_h_pr_protect() 229 pte[1] = be64_to_cpu((__force __be64)pte[1]); in kvmppc_h_pr_protect()
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D | book3s_hv_rm_mmu.c | 196 __be64 *hpte; in kvmppc_do_h_enter() 304 hpte = (__be64 *)(kvm->arch.hpt.virt + (pte_index << 4)); in kvmppc_do_h_enter() 335 hpte = (__be64 *)(kvm->arch.hpt.virt + (pte_index << 4)); in kvmppc_do_h_enter() 486 __be64 *hpte; in kvmppc_do_h_remove() 495 hpte = (__be64 *)(kvm->arch.hpt.virt + (pte_index << 4)); in kvmppc_do_h_remove() 556 __be64 *hp, *hptes[4]; in kvmppc_h_bulk_remove() 588 hp = (__be64 *) (kvm->arch.hpt.virt + (pte_index << 4)); in kvmppc_h_bulk_remove() 675 __be64 *hpte; in kvmppc_h_protect() 685 hpte = (__be64 *)(kvm->arch.hpt.virt + (pte_index << 4)); in kvmppc_h_protect() 746 __be64 *hpte; in kvmppc_h_read() [all …]
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D | book3s_64_mmu_hv.c | 340 __be64 *hptep; in kvmppc_mmu_book3s_64_hv_xlate() 366 hptep = (__be64 *)(kvm->arch.hpt.virt + (index << 4)); in kvmppc_mmu_book3s_64_hv_xlate() 489 __be64 *hptep; in kvmppc_book3s_hv_page_fault() 531 hptep = (__be64 *)(kvm->arch.hpt.virt + (index << 4)); in kvmppc_book3s_hv_page_fault() 760 __be64 *hptep = (__be64 *) (kvm->arch.hpt.virt + (i << 4)); in kvmppc_unmap_hpte() 802 __be64 *hptep; in kvm_unmap_rmapp() 819 hptep = (__be64 *) (kvm->arch.hpt.virt + (i << 4)); in kvm_unmap_rmapp() 881 __be64 *hptep; in kvm_age_rmapp() 899 hptep = (__be64 *) (kvm->arch.hpt.virt + (i << 4)); in kvm_age_rmapp() 1017 __be64 *hptep; in kvm_test_clear_dirty_npages() [all …]
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/arch/powerpc/perf/ |
D | hv-24x7.h | 152 __be64 cec_cfg_instance_id; 153 __be64 catalog_version_num;
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D | hv-24x7-catalog.h | 13 __be64 version; /* XXX: arbitrary? what's the meaning/useage/purpose? */
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/arch/powerpc/sysdev/xive/ |
D | native.c | 48 __be64 flags, eoi_page, trig_page; in xive_native_populate_irq_data() 115 __be64 vp; in xive_native_get_irq_config() 133 __be64 qeoi_page_be; in xive_native_configure_queue() 393 __be64 vp_cam_be; in xive_native_setup_cpu() 737 __be64 vp_cam_be; in xive_native_get_vp_info() 772 __be64 qpage; in xive_native_get_queue_info() 773 __be64 qsize; in xive_native_get_queue_info() 774 __be64 qeoi_page; in xive_native_get_queue_info() 776 __be64 qflags; in xive_native_get_queue_info() 846 __be64 state; in xive_native_get_vp_state()
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/arch/sparc/crypto/ |
D | sha512_glue.c | 103 __be64 *dst = (__be64 *)out; in sha512_sparc64_final() 104 __be64 bits[2]; in sha512_sparc64_final()
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/arch/powerpc/boot/ |
D | libfdt_env.h | 18 typedef __be64 fdt64_t;
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/arch/mips/cavium-octeon/crypto/ |
D | octeon-sha512.c | 176 __be64 *dst = (__be64 *)hash; in octeon_sha512_final() 180 __be64 bits[2]; in octeon_sha512_final()
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/arch/powerpc/crypto/ |
D | sha1-spe-glue.c | 122 __be64 *pbits = (__be64 *)(((char *)&sctx->buffer) + 56); in ppc_spe_sha1_final()
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