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/arch/xtensa/mm/
Dmisc.S36 __loopi a2, a7, PAGE_SIZE, 32
37 s32i a3, a2, 0
38 s32i a3, a2, 4
39 s32i a3, a2, 8
40 s32i a3, a2, 12
41 s32i a3, a2, 16
42 s32i a3, a2, 20
43 s32i a3, a2, 24
44 s32i a3, a2, 28
45 __endla a2, a7, 32
[all …]
/arch/csky/abiv2/
Dstrcpy.S14 ldw a2, (a1)
15 tstnbz a2
17 stw a2, (a3)
19 ldw a2, (a1, 4)
20 tstnbz a2
22 stw a2, (a3, 4)
24 ldw a2, (a1, 8)
25 tstnbz a2
27 stw a2, (a3, 8)
29 ldw a2, (a1, 12)
[all …]
Dstrcmp.S10 xor a2, a3, a1
11 andi a2, 0x3
12 bnez a2, 7f
86 xtrb0 a2, t1
87 subu a0, a2
88 bez a2, 4f
93 xtrb1 a2, t1
94 subu a0, a2
95 bez a2, 4f
100 xtrb2 a2, t1
[all …]
Dmcount.S31 stw a2, (sp, 8)
40 ldw a2, (sp, 8)
71 stw a2, (sp, 8)
79 ldw a2, (sp, 8)
108 lrw a2, function_trace_op
109 ldw a2, (a2, 0)
147 lrw a2, function_trace_op
148 ldw a2, (a2, 0)
170 mov a2, r8
195 lrw a2, function_trace_op
[all …]
/arch/riscv/lib/
Dtishift.S10 beqz a2, .L1
12 sub a5,a5,a2
15 sext.w a2,a2
16 srl a0,a0,a2
18 srl a2,a1,a2
20 mv a1,a2
25 li a2,0
27 mv a1,a2
33 beqz a2, .L3
35 sub a5,a5,a2
[all …]
/arch/xtensa/lib/
Dchecksum.S47 extui a5, a2, 0, 2
57 add a5, a5, a2 /* a5 = end of last 32-byte chunk */
60 l32i a6, a2, 0
61 l32i a7, a2, 4
64 l32i a6, a2, 8
65 l32i a7, a2, 12
68 l32i a6, a2, 16
69 l32i a7, a2, 20
72 l32i a6, a2, 24
73 l32i a7, a2, 28
[all …]
Dstrnlen_user.S35 # a2/ src
49 # a2/ s, a3/ len
50 addi a4, a2, -4 # because we overincrement at the end;
56 bbsi.l a2, 0, .L1mod2 # if only 8-bit aligned
57 bbsi.l a2, 1, .L2mod4 # if only 16-bit aligned
98 sub a2, a4, a2 # compute length
108 sub a2, a4, a2 # subtract to get length
112 sub a2, a4, a2 # subtract to get length
116 sub a2, a4, a2 # subtract to get length
132 sub a2, a4, a2 # subtract to get length
[all …]
Dstrncpy_user.S38 # a2/ return value
54 # a2/ dst, a3/ src, a4/ len
55 mov a11, a2 # leave dst in return value register
95 sub a2, a11, a2 # compute strlen
150 sub a2, a11, a2 # compute strlen
157 sub a2, a11, a2 # compute strlen
165 sub a2, a11, a2 # compute strlen
175 sub a2, a11, a2 # compute strlen
201 sub a2, a11, a2 # compute strlen
216 movi a2, -EFAULT
/arch/xtensa/kernel/
Dhead.S57 wsr a2, excsave1
86 rsr a2, excsave1
88 bltu a2, a3, 1f
89 sub a2, a2, a3
91 bgeu a2, a3, 1f
93 add a2, a2, a3
94 wsr a2, excsave1
115 movi a2, VECBASE_VADDR
116 wsr a2, vecbase
156 movi a2, XCHAL_INTTYPE_MASK_SOFTWARE | XCHAL_INTTYPE_MASK_EXTERN_EDGE
[all …]
Dentry.S136 s32i a1, a2, PT_AREG1
137 s32i a0, a2, PT_AREG2
138 s32i a3, a2, PT_AREG3
139 mov a1, a2
146 movi a2, 0
147 wsr a2, depc # terminate user stack trace with 0
149 xsr a2, icountlevel
151 s32i a2, a1, PT_ICOUNTLEVEL
154 rur a2, threadptr
155 s32i a2, a1, PT_THREADPTR
[all …]
Dvectors.S75 wsr a2, depc # save a2
76 l32i a2, a3, EXC_TABLE_KSTK # load kernel stack to a2
77 s32i a0, a2, PT_AREG0 # save a0 to ESF
79 s32i a0, a2, PT_DEPC # mark it as a regular exception
102 wsr a2, depc # save a2
103 addi a2, a1, -16-PT_SIZE # adjust stack pointer
104 s32i a0, a2, PT_AREG0 # save a0 to ESF
106 s32i a0, a2, PT_DEPC # mark it as a regular exception
213 s32i a2, a3, EXC_TABLE_DOUBLE_SAVE
217 rsr a2, ps
[all …]
Dcoprocessor.S32 xchal_cp##x##_store a2 a3 a4 a5 a6; \
49 xchal_cp##x##_load a2 a3 a4 a5 a6; \
120 s32i a3, a2, PT_AREG3
122 s32i a1, a2, PT_AREG1
123 s32i a3, a2, PT_SAR
124 mov a1, a2
125 rsr a2, depc
126 s32i a2, a1, PT_AREG2
144 movi a2, 1
146 sll a2, a2
[all …]
Dalign.S165 s32i a4, a2, PT_AREG4
166 s32i a5, a2, PT_AREG5
167 s32i a6, a2, PT_AREG6
168 s32i a7, a2, PT_AREG7
169 s32i a8, a2, PT_AREG8
172 s32i a0, a2, PT_AREG2
173 s32i a3, a2, PT_AREG3
280 s32i a3, a2, PT_AREG0; _j .Lexit; .align 8
282 s32i a3, a2, PT_AREG2; _j .Lexit; .align 8
283 s32i a3, a2, PT_AREG3; _j .Lexit; .align 8
[all …]
/arch/mips/lib/
Dmemset.S95 sltiu t0, a2, STORSIZE /* very small region? */
126 PTR_ADDU a2, t0 /* correct size */
136 PTR_ADDU a2, t0 /* correct size */
154 1: ori t1, a2, 0x3f /* # of full blocks */
156 andi t0, a2, 0x40-STORSIZE
184 2: andi a2, STORMASK /* At most one long to go */
187 beqz a2, 1f
189 PTR_ADDU a0, a2 /* What's left */
198 PTR_SUBU t0, $0, a2
200 move a2, zero /* No remaining longs */
[all …]
/arch/mips/kernel/
Dlinux32.c54 unsigned long, __dummy, unsigned long, a2, unsigned long, a3)
56 return ksys_truncate(path, merge_64(a2, a3));
60 unsigned long, a2, unsigned long, a3)
62 return ksys_ftruncate(fd, merge_64(a2, a3));
102 asmlinkage ssize_t sys32_readahead(int fd, u32 pad0, u64 a2, u64 a3, in sys32_readahead() argument
105 return ksys_readahead(fd, merge_64(a2, a3), count); in sys32_readahead()
109 unsigned long a2, unsigned long a3, in sys32_sync_file_range() argument
114 merge_64(a2, a3), merge_64(a4, a5), in sys32_sync_file_range()
119 unsigned long a2, unsigned long a3, in sys32_fadvise64_64() argument
124 merge_64(a2, a3), merge_64(a4, a5), in sys32_fadvise64_64()
Dr4k_switch.S44 move $28, a2
52 LONG_L a2, THREAD_STATUS(a1)
54 and a2, a3
55 or a2, t1
56 mtc0 a2, CP0_STATUS
Dr2300_switch.S49 move $28, a2
58 lw a2, THREAD_STATUS(a1)
60 and a2, a3
61 or a2, t1
62 mtc0 a2, CP0_STATUS
Dentry.S51 LONG_L a2, TI_FLAGS($28) # current->work
52 andi t0, a2, _TIF_WORK_MASK # (ignoring syscall_trace)
88 LONG_L a2, TI_FLAGS($28) # current->work
90 and t0, a2, t0
123 andi t0, a2, _TIF_NEED_RESCHED # a2 is preloaded with TI_FLAGS
132 LONG_L a2, TI_FLAGS($28)
133 andi t0, a2, _TIF_WORK_MASK # is there any work to be done
136 andi t0, a2, _TIF_NEED_RESCHED
143 jal do_notify_resume # a2 already loaded
/arch/riscv/kernel/
Dhead.S87 la a2, _start
88 sub a1, a1, a2
92 la a2, 1f
93 add a2, a2, a1
94 csrw CSR_TVEC, a2
97 srl a2, a0, PAGE_SHIFT
99 or a2, a2, a1
131 csrw CSR_SATP, a2
261 li a2, 1
262 amoadd.w a3, a2, (a3)
[all …]
/arch/arm/include/asm/
Dxor.h12 #define __XOR(a1, a2) a1 ^= a2 argument
16 : "=r" (dst), "=r" (a1), "=r" (a2) \
21 : "=r" (dst), "=r" (a1), "=r" (a2), "=r" (a3), "=r" (a4) \
28 __XOR(a1, b1); __XOR(a2, b2);
34 __XOR(a1, b1); __XOR(a2, b2); __XOR(a3, b3); __XOR(a4, b4)
39 : "0" (dst), "r" (a1), "r" (a2))
44 : "0" (dst), "r" (a1), "r" (a2), "r" (a3), "r" (a4))
51 register unsigned int a2 __asm__("r5"); in xor_arm4regs_2()
72 register unsigned int a2 __asm__("r5"); in xor_arm4regs_3()
94 register unsigned int a2 __asm__("r9"); in xor_arm4regs_4()
[all …]
/arch/m68k/kernel/
Drelocate_kernel.S97 movel %d0,%a2 /* a2 = dst = entry & PAGE_MASK */
108 movel %a3@+,%a2@+ /* *dst++ = *src++ */
109 movel %a3@+,%a2@+ /* *dst++ = *src++ */
110 movel %a3@+,%a2@+ /* *dst++ = *src++ */
111 movel %a3@+,%a2@+ /* *dst++ = *src++ */
112 movel %a3@+,%a2@+ /* *dst++ = *src++ */
113 movel %a3@+,%a2@+ /* *dst++ = *src++ */
114 movel %a3@+,%a2@+ /* *dst++ = *src++ */
115 movel %a3@+,%a2@+ /* *dst++ = *src++ */
/arch/x86/include/asm/xen/
Dhypercall.h129 #define __HYPERCALL_2ARG(a1,a2) \ argument
130 __HYPERCALL_1ARG(a1) __arg2 = (unsigned long)(a2);
131 #define __HYPERCALL_3ARG(a1,a2,a3) \ argument
132 __HYPERCALL_2ARG(a1,a2) __arg3 = (unsigned long)(a3);
133 #define __HYPERCALL_4ARG(a1,a2,a3,a4) \ argument
134 __HYPERCALL_3ARG(a1,a2,a3) __arg4 = (unsigned long)(a4);
135 #define __HYPERCALL_5ARG(a1,a2,a3,a4,a5) \ argument
136 __HYPERCALL_4ARG(a1,a2,a3,a4) __arg5 = (unsigned long)(a5);
167 #define _hypercall2(type, name, a1, a2) \ argument
170 __HYPERCALL_2ARG(a1, a2); \
[all …]
/arch/mips/include/asm/
Dsgiarcs.h393 #define ARC_CALL2(dest, a1, a2) \ argument
396 int __a2 = (int) (long) (a2); \
402 #define ARC_CALL3(dest, a1, a2, a3) \ argument
405 int __a2 = (int) (long) (a2); \
412 #define ARC_CALL4(dest, a1, a2, a3, a4) \ argument
415 int __a2 = (int) (long) (a2); \
423 #define ARC_CALL5(dest, a1, a2, a3, a4, a5) \ argument
426 int __a2 = (int) (long) (a2); \
457 #define ARC_CALL2(dest, a1, a2) \ argument
460 long __a2 = (long) (a2); \
[all …]
/arch/alpha/lib/
Dstxncpy.S62 beq a2, $a_eoc # .. e1 :
73 subq a2, 1, a2 # e0 :
75 beq a2, $a_eoc # e1 :
125 addq a2, t0, a2 # .. e1 : bias count by dest misalignment
126 subq a2, 1, a2 # e0 :
127 and a2, 7, t2 # e1 :
128 srl a2, 3, a2 # e0 : a2 = loop counter = (count - 1)/8
167 beq a2, $u_eocfin # .. e1 :
177 subq a2, 1, a2 # e0 :
184 beq a2, $u_eoc # .. e1 :
[all …]
/arch/m68k/include/asm/
Dentry.h76 moveml %d1-%d5/%a0-%a2,%sp@
86 moveml %d1-%d5/%a0-%a2,%sp@
101 moveml %sp@,%d1-%d5/%a0-%a2
132 moveml %d1-%d5/%a0-%a2,%sp@
141 moveml %d1-%d5/%a0-%a2,%sp@
145 moveml %sp@,%d1-%d5/%a0-%a2
190 moveml %d1-%d5/%a0-%a2,%sp@-
197 moveml %d1-%d5/%a0-%a2,%sp@-
201 moveml %sp@+,%a0-%a2/%d1-%d5
226 #define curptr a2

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