/arch/um/drivers/ |
D | chan_kern.c | 84 static int open_one_chan(struct chan *chan) in open_one_chan() argument 88 if (chan->opened) in open_one_chan() 91 if (chan->ops->open == NULL) in open_one_chan() 93 else fd = (*chan->ops->open)(chan->input, chan->output, chan->primary, in open_one_chan() 94 chan->data, &chan->dev); in open_one_chan() 100 (*chan->ops->close)(fd, chan->data); in open_one_chan() 104 chan->fd = fd; in open_one_chan() 106 chan->opened = 1; in open_one_chan() 113 struct chan *chan; in open_chan() local 117 chan = list_entry(ele, struct chan, list); in open_chan() [all …]
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D | chan.h | 15 struct chan { struct 33 extern int write_chan(struct chan *chan, const char *buf, int len, argument 35 extern int console_write_chan(struct chan *chan, const char *buf, 38 extern void deactivate_chan(struct chan *chan, int irq); 39 extern void reactivate_chan(struct chan *chan, int irq); 40 extern void chan_enable_winch(struct chan *chan, struct tty_port *port);
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/arch/sh/drivers/dma/ |
D | dma-sh.c | 39 static unsigned long dma_find_base(unsigned int chan) in dma_find_base() argument 44 if (chan >= SH_DMAC_NR_MD_CH) in dma_find_base() 51 static unsigned long dma_base_addr(unsigned int chan) in dma_base_addr() argument 53 unsigned long base = dma_find_base(chan); in dma_base_addr() 55 chan = (chan % SH_DMAC_NR_MD_CH) * SH_DMAC_CH_SZ; in dma_base_addr() 58 if (chan >= DMAOR) in dma_base_addr() 61 return base + chan; in dma_base_addr() 65 static inline unsigned int get_dmte_irq(unsigned int chan) in get_dmte_irq() argument 67 return chan >= 6 ? DMTE6_IRQ : DMTE0_IRQ; in get_dmte_irq() 87 static inline unsigned int get_dmte_irq(unsigned int chan) in get_dmte_irq() argument [all …]
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D | dma-g2.c | 61 struct dma_channel *chan = info->channels + i; in g2_dma_interrupt() local 63 wake_up(&chan->wait_queue); in g2_dma_interrupt() 73 static int g2_enable_dma(struct dma_channel *chan) in g2_enable_dma() argument 75 unsigned int chan_nr = chan->chan; in g2_enable_dma() 83 static int g2_disable_dma(struct dma_channel *chan) in g2_disable_dma() argument 85 unsigned int chan_nr = chan->chan; in g2_disable_dma() 93 static int g2_xfer_dma(struct dma_channel *chan) in g2_xfer_dma() argument 95 unsigned int chan_nr = chan->chan; in g2_xfer_dma() 97 if (chan->sar & 31) { in g2_xfer_dma() 98 printk("g2dma: unaligned source 0x%lx\n", chan->sar); in g2_xfer_dma() [all …]
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D | dma-api.c | 24 struct dma_info *get_dma_info(unsigned int chan) in get_dma_info() argument 33 if ((chan < info->first_vchannel_nr) || in get_dma_info() 34 (chan >= info->first_vchannel_nr + info->nr_channels)) in get_dma_info() 73 struct dma_channel *get_dma_channel(unsigned int chan) in get_dma_channel() argument 75 struct dma_info *info = get_dma_info(chan); in get_dma_channel() 84 if (channel->vchan == chan) in get_dma_channel() 92 int get_dma_residue(unsigned int chan) in get_dma_residue() argument 94 struct dma_info *info = get_dma_info(chan); in get_dma_residue() 95 struct dma_channel *channel = get_dma_channel(chan); in get_dma_residue() 155 if (request_dma(channel->chan, dev_id) == 0) in request_dma_bycap() [all …]
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D | dma-pvr2.c | 38 static int pvr2_request_dma(struct dma_channel *chan) in pvr2_request_dma() argument 48 static int pvr2_get_dma_residue(struct dma_channel *chan) in pvr2_get_dma_residue() argument 53 static int pvr2_xfer_dma(struct dma_channel *chan) in pvr2_xfer_dma() argument 55 if (chan->sar || !chan->dar) in pvr2_xfer_dma() 60 __raw_writel(chan->dar, PVR2_DMA_ADDR); in pvr2_xfer_dma() 61 __raw_writel(chan->count, PVR2_DMA_COUNT); in pvr2_xfer_dma() 62 __raw_writel(chan->mode & DMA_MODE_MASK, PVR2_DMA_MODE); in pvr2_xfer_dma()
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D | dma-sysfs.c | 37 channel->chan, info->name, in dma_show_devices() 121 int dma_create_sysfs_files(struct dma_channel *chan, struct dma_info *info) in dma_create_sysfs_files() argument 123 struct device *dev = &chan->dev; in dma_create_sysfs_files() 127 dev->id = chan->vchan; in dma_create_sysfs_files() 145 snprintf(name, sizeof(name), "dma%d", chan->chan); in dma_create_sysfs_files() 149 void dma_remove_sysfs_files(struct dma_channel *chan, struct dma_info *info) in dma_remove_sysfs_files() argument 151 struct device *dev = &chan->dev; in dma_remove_sysfs_files() 160 snprintf(name, sizeof(name), "dma%d", chan->chan); in dma_remove_sysfs_files()
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/arch/mips/include/asm/mach-au1x00/ |
D | au1000_dma.h | 156 struct dma_chan *chan = get_dma_chan(dmanr); in enable_dma_buffer0() local 158 if (!chan) in enable_dma_buffer0() 160 __raw_writel(DMA_BE0, chan->io + DMA_MODE_SET); in enable_dma_buffer0() 165 struct dma_chan *chan = get_dma_chan(dmanr); in enable_dma_buffer1() local 167 if (!chan) in enable_dma_buffer1() 169 __raw_writel(DMA_BE1, chan->io + DMA_MODE_SET); in enable_dma_buffer1() 173 struct dma_chan *chan = get_dma_chan(dmanr); in enable_dma_buffers() local 175 if (!chan) in enable_dma_buffers() 177 __raw_writel(DMA_BE0 | DMA_BE1, chan->io + DMA_MODE_SET); in enable_dma_buffers() 182 struct dma_chan *chan = get_dma_chan(dmanr); in start_dma() local [all …]
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/arch/arm/kernel/ |
D | dma.c | 28 static inline dma_t *dma_channel(unsigned int chan) in dma_channel() argument 30 if (chan >= MAX_DMA_CHANNELS) in dma_channel() 33 return dma_chan[chan]; in dma_channel() 36 int __init isa_dma_add(unsigned int chan, dma_t *dma) in isa_dma_add() argument 43 if (dma_chan[chan]) in isa_dma_add() 45 dma_chan[chan] = dma; in isa_dma_add() 54 int request_dma(unsigned int chan, const char *device_id) in request_dma() argument 56 dma_t *dma = dma_channel(chan); in request_dma() 71 ret = dma->d_ops->request(chan, dma); in request_dma() 79 pr_err("dma: trying to allocate DMA%d\n", chan); in request_dma() [all …]
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D | dma-isa.c | 44 static int isa_get_dma_residue(unsigned int chan, dma_t *dma) in isa_get_dma_residue() argument 46 unsigned int io_port = isa_dma_port[chan][ISA_DMA_COUNT]; in isa_get_dma_residue() 52 return chan < 4 ? count : (count << 1); in isa_get_dma_residue() 61 static void isa_enable_dma(unsigned int chan, dma_t *dma) in isa_enable_dma() argument 68 mode = (chan & 3) | dma->dma_mode; in isa_enable_dma() 103 outb(address >> 16, isa_dma_port[chan][ISA_DMA_PGLO]); in isa_enable_dma() 104 outb(address >> 24, isa_dma_port[chan][ISA_DMA_PGHI]); in isa_enable_dma() 106 if (chan >= 4) { in isa_enable_dma() 111 outb(0, isa_dma_port[chan][ISA_DMA_CLRFF]); in isa_enable_dma() 113 outb(address, isa_dma_port[chan][ISA_DMA_ADDR]); in isa_enable_dma() [all …]
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/arch/sh/drivers/pci/ |
D | pci-sh7751.c | 19 static int __init __area_sdram_check(struct pci_channel *chan, in __area_sdram_check() argument 31 pci_write_reg(chan, word, SH4_PCIBCR1); in __area_sdram_check() 40 pci_write_reg(chan, word, SH4_PCIBCR2); in __area_sdram_check() 77 struct pci_channel *chan = &sh7751_pci_controller; in sh7751_pci_init() local 83 chan->reg_base = 0xfe200000; in sh7751_pci_init() 86 id = pci_read_reg(chan, SH7751_PCICONF0); in sh7751_pci_init() 99 pci_write_reg(chan, 0, SH4_PCICLKR); in sh7751_pci_init() 102 pci_write_reg(chan, word, SH4_PCIPINT); in sh7751_pci_init() 110 pci_write_reg(chan, word, SH7751_PCICONF1); in sh7751_pci_init() 114 pci_write_reg(chan, word, SH7751_PCICONF2); in sh7751_pci_init() [all …]
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D | pcie-sh7786.c | 155 static int __init phy_wait_for_ack(struct pci_channel *chan) in phy_wait_for_ack() argument 160 if (pci_read_reg(chan, SH4A_PCIEPHYADRR) & (1 << BITS_ACK)) in phy_wait_for_ack() 169 static int __init pci_wait_for_irq(struct pci_channel *chan, unsigned int mask) in pci_wait_for_irq() argument 174 if ((pci_read_reg(chan, SH4A_PCIEINTR) & mask) == mask) in pci_wait_for_irq() 183 static void __init phy_write_reg(struct pci_channel *chan, unsigned int addr, in phy_write_reg() argument 192 pci_write_reg(chan, data, SH4A_PCIEPHYDOUTR); in phy_write_reg() 193 pci_write_reg(chan, phyaddr, SH4A_PCIEPHYADRR); in phy_write_reg() 195 phy_wait_for_ack(chan); in phy_write_reg() 198 pci_write_reg(chan, 0, SH4A_PCIEPHYDOUTR); in phy_write_reg() 199 pci_write_reg(chan, 0, SH4A_PCIEPHYADRR); in phy_write_reg() [all …]
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D | fixups-rts7751r2d.c | 39 int pci_fixup_pcic(struct pci_channel *chan) in pci_fixup_pcic() argument 45 pci_write_reg(chan, bcr1, SH4_PCIBCR1); in pci_fixup_pcic() 48 pci_write_reg(chan, 0x0000c3ff, SH4_PCIINTM); in pci_fixup_pcic() 49 pci_write_reg(chan, 0x0000380f, SH4_PCIAINTM); in pci_fixup_pcic() 51 pci_write_reg(chan, 0xfb900047, SH7751_PCICONF1); in pci_fixup_pcic() 52 pci_write_reg(chan, 0xab000001, SH7751_PCICONF4); in pci_fixup_pcic() 56 pci_write_reg(chan, mcr, SH4_PCIMCR); in pci_fixup_pcic() 58 pci_write_reg(chan, 0x0c000000, SH7751_PCICONF5); in pci_fixup_pcic() 59 pci_write_reg(chan, 0xd0000000, SH7751_PCICONF6); in pci_fixup_pcic() 60 pci_write_reg(chan, 0x0c000000, SH4_PCILAR0); in pci_fixup_pcic() [all …]
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D | pci-sh7780.c | 246 struct pci_channel *chan = &sh7780_pci_controller; in sh7780_pci_init() local 255 chan->reg_base = 0xfe040000; in sh7780_pci_init() 262 chan->reg_base + SH4_PCICR); in sh7780_pci_init() 271 id = __raw_readw(chan->reg_base + PCI_VENDOR_ID); in sh7780_pci_init() 277 id = __raw_readw(chan->reg_base + PCI_DEVICE_ID); in sh7780_pci_init() 290 type, __raw_readb(chan->reg_base + PCI_REVISION_ID)); in sh7780_pci_init() 297 chan->reg_base + SH4_PCICR); in sh7780_pci_init() 307 __raw_writel(memphys + SZ_512M, chan->reg_base + SH4_PCILAR1); in sh7780_pci_init() 309 chan->reg_base + SH4_PCILSR1); in sh7780_pci_init() 315 __raw_writel(0, chan->reg_base + SH4_PCILAR1); in sh7780_pci_init() [all …]
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D | fixups-landisk.c | 39 int pci_fixup_pcic(struct pci_channel *chan) in pci_fixup_pcic() argument 45 pci_write_reg(chan, bcr1, SH4_PCIBCR1); in pci_fixup_pcic() 49 pci_write_reg(chan, mcr, SH4_PCIMCR); in pci_fixup_pcic() 51 pci_write_reg(chan, 0x0c000000, SH7751_PCICONF5); in pci_fixup_pcic() 52 pci_write_reg(chan, 0xd0000000, SH7751_PCICONF6); in pci_fixup_pcic() 53 pci_write_reg(chan, 0x0c000000, SH4_PCILAR0); in pci_fixup_pcic() 54 pci_write_reg(chan, 0x00000000, SH4_PCILAR1); in pci_fixup_pcic()
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D | ops-sh7786.c | 22 struct pci_channel *chan = bus->sysdata; in sh7786_pcie_config_access() local 51 *data = pci_read_reg(chan, PCI_REG(reg)); in sh7786_pcie_config_access() 53 pci_write_reg(chan, *data, PCI_REG(reg)); in sh7786_pcie_config_access() 61 pci_write_reg(chan, pci_read_reg(chan, SH4A_PCIEERRFR), SH4A_PCIEERRFR); in sh7786_pcie_config_access() 64 pci_write_reg(chan, (bus->number << 24) | (dev << 19) | in sh7786_pcie_config_access() 68 pci_write_reg(chan, (1 << 31) | (type << 8), SH4A_PCIEPCTLR); in sh7786_pcie_config_access() 71 if (pci_read_reg(chan, SH4A_PCIEERRFR) & 0x10) in sh7786_pcie_config_access() 75 if (pci_read_reg(chan, SH4A_PCIEPCICONF1) & ((1 << 29) | (1 << 28))) in sh7786_pcie_config_access() 79 *data = pci_read_reg(chan, SH4A_PCIEPDR); in sh7786_pcie_config_access() 81 pci_write_reg(chan, *data, SH4A_PCIEPDR); in sh7786_pcie_config_access() [all …]
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D | ops-sh4.c | 25 struct pci_channel *chan = bus->sysdata; in sh4_pci_read() local 34 pci_write_reg(chan, CONFIG_CMD(bus, devfn, where), SH4_PCIPAR); in sh4_pci_read() 35 data = pci_read_reg(chan, SH4_PCIPDR); in sh4_pci_read() 63 struct pci_channel *chan = bus->sysdata; in sh4_pci_write() local 69 pci_write_reg(chan, CONFIG_CMD(bus, devfn, where), SH4_PCIPAR); in sh4_pci_write() 70 data = pci_read_reg(chan, SH4_PCIPDR); in sh4_pci_write() 91 pci_write_reg(chan, data, SH4_PCIPDR); in sh4_pci_write() 101 int __attribute__((weak)) pci_fixup_pcic(struct pci_channel *chan) in pci_fixup_pcic() argument
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/arch/sh/include/asm/ |
D | dma.h | 53 int (*request)(struct dma_channel *chan); 54 void (*free)(struct dma_channel *chan); 56 int (*get_residue)(struct dma_channel *chan); 57 int (*xfer)(struct dma_channel *chan); 58 int (*configure)(struct dma_channel *chan, unsigned long flags); 59 int (*extend)(struct dma_channel *chan, unsigned long op, void *param); 65 unsigned int chan; /* DMAC channel number */ member 108 extern int dma_xfer(unsigned int chan, unsigned long from, 111 #define dma_write(chan, from, to, size) \ argument 112 dma_xfer(chan, from, to, size, DMA_MODE_WRITE) [all …]
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/arch/arm/include/asm/ |
D | dma.h | 54 #define clear_dma_ff(chan) argument 61 extern void set_dma_page(unsigned int chan, char pagenr); 67 extern int request_dma(unsigned int chan, const char * device_id); 73 extern void free_dma(unsigned int chan); 80 extern void enable_dma(unsigned int chan); 87 extern void disable_dma(unsigned int chan); 91 extern int dma_channel_active(unsigned int chan); 99 extern void set_dma_sg(unsigned int chan, struct scatterlist *sg, int nr_sg); 107 extern void __set_dma_addr(unsigned int chan, void *addr); 108 #define set_dma_addr(chan, addr) \ argument [all …]
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/arch/mips/alchemy/common/ |
D | dma.c | 104 struct dma_chan *chan; in au1000_dma_read_proc() local 107 chan = get_dma_chan(i); in au1000_dma_read_proc() 108 if (chan != NULL) in au1000_dma_read_proc() 110 i, chan->dev_str); in au1000_dma_read_proc() 136 struct dma_chan *chan; in dump_au1000_dma_channel() local 140 chan = &au1000_dma_table[dmanr]; in dump_au1000_dma_channel() 144 __raw_readl(chan->io + DMA_MODE_SET)); in dump_au1000_dma_channel() 146 __raw_readl(chan->io + DMA_PERIPHERAL_ADDR)); in dump_au1000_dma_channel() 148 __raw_readl(chan->io + DMA_BUFFER0_START)); in dump_au1000_dma_channel() 150 __raw_readl(chan->io + DMA_BUFFER1_START)); in dump_au1000_dma_channel() [all …]
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/arch/powerpc/platforms/pasemi/ |
D | dma_lib.c | 129 static void pasemi_free_tx_chan(int chan) in pasemi_free_tx_chan() argument 131 BUG_ON(test_bit(chan, txch_free)); in pasemi_free_tx_chan() 132 set_bit(chan, txch_free); in pasemi_free_tx_chan() 148 static void pasemi_free_rx_chan(int chan) in pasemi_free_rx_chan() argument 150 BUG_ON(test_bit(chan, rxch_free)); in pasemi_free_rx_chan() 151 set_bit(chan, rxch_free); in pasemi_free_rx_chan() 173 struct pasemi_dmachan *chan; in pasemi_dma_alloc_chan() local 182 chan = buf + offset; in pasemi_dma_alloc_chan() 184 chan->priv = buf; in pasemi_dma_alloc_chan() 189 chan->chno = chno; in pasemi_dma_alloc_chan() [all …]
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/arch/mips/kernel/ |
D | rtlx.c | 38 struct rtlx_channel *chan = &rtlx->channel[i]; in dump_rtlx() local 41 chan->rt_state, chan->lx_state, chan->buffer_size); in dump_rtlx() 44 chan->rt_read, chan->rt_write); in dump_rtlx() 47 chan->lx_read, chan->lx_write); in dump_rtlx() 49 pr_info(" rt_buffer <%s>\n", chan->rt_buffer); in dump_rtlx() 50 pr_info(" lx_buffer <%s>\n", chan->lx_buffer); in dump_rtlx() 94 struct rtlx_channel *chan; in rtlx_open() local 165 chan = &rtlx->channel[index]; in rtlx_open() 167 state = xchg(&chan->lx_state, RTLX_STATE_OPENED); in rtlx_open() 194 struct rtlx_channel *chan; in rtlx_read_poll() local [all …]
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/arch/m68k/mac/ |
D | iop.c | 308 int iop_listen(uint iop_num, uint chan, in iop_listen() argument 313 if (chan >= NUM_IOP_CHAN) return -EINVAL; in iop_listen() 314 if (iop_listeners[iop_num][chan].handler && handler) return -EINVAL; in iop_listen() 315 iop_listeners[iop_num][chan].devname = devname; in iop_listen() 316 iop_listeners[iop_num][chan].handler = handler; in iop_listen() 329 int chan = msg->channel; in iop_complete_message() local 342 IOP_ADDR_RECV_STATE + chan, IOP_MSG_COMPLETE); in iop_complete_message() 376 static void iop_handle_send(uint iop_num, uint chan) in iop_handle_send() argument 382 iop_writeb(iop, IOP_ADDR_SEND_STATE + chan, IOP_MSG_IDLE); in iop_handle_send() 384 if (!(msg = iop_send_queue[iop_num][chan])) return; in iop_handle_send() [all …]
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/arch/mips/include/asm/sibyte/ |
D | bcm1480_regs.h | 207 #define A_BCM1480_DUART(chan) ((((chan)&2) == 0)? A_BCM1480_DUART0 : A_BCM1480_DUART1) argument 210 #define A_BCM1480_DUART_CHANREG(chan, reg) \ argument 211 (A_BCM1480_DUART(chan) + \ 212 BCM1480_DUART_CHANREG_SPACING * (((chan) & 1) + 1) + (reg)) 213 #define A_BCM1480_DUART_CTRLREG(chan, reg) \ argument 214 (A_BCM1480_DUART(chan) + \ 220 #define R_BCM1480_DUART_IMRREG(chan) \ argument 221 (R_DUART_IMR_A + ((chan) & 1) * DUART_IMRISR_SPACING) 222 #define R_BCM1480_DUART_ISRREG(chan) \ argument 223 (R_DUART_ISR_A + ((chan) & 1) * DUART_IMRISR_SPACING) [all …]
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D | sb1250_regs.h | 163 #define A_MAC_DMA_CHANNEL_BASE(macnum, txrx, chan) \ argument 167 (MAC_DMA_CHANNEL_SPACING*(chan))) 169 #define R_MAC_DMA_CHANNEL_BASE(txrx, chan) \ argument 172 (MAC_DMA_CHANNEL_SPACING*(chan))) 174 #define A_MAC_DMA_REGISTER(macnum, txrx, chan, reg) \ argument 175 (A_MAC_DMA_CHANNEL_BASE(macnum, txrx, chan) + \ 178 #define R_MAC_DMA_REGISTER(txrx, chan, reg) \ argument 179 (R_MAC_DMA_CHANNEL_BASE(txrx, chan) + \ 269 #define A_DUART_CHANREG(chan, reg) \ argument 270 (A_DUART + DUART_CHANREG_SPACING * ((chan) + 1) + (reg)) [all …]
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