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Searched refs:cl (Results 1 – 25 of 57) sorted by relevance

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/arch/openrisc/kernel/
Ddma.c27 unsigned long cl; in page_set_nocache() local
39 for (cl = __pa(addr); cl < __pa(next); cl += cpuinfo->dcache_block_size) in page_set_nocache()
40 mtspr(SPR_DCBFR, cl); in page_set_nocache()
101 unsigned long cl; in arch_sync_dma_for_device() local
107 for (cl = addr; cl < addr + size; in arch_sync_dma_for_device()
108 cl += cpuinfo->dcache_block_size) in arch_sync_dma_for_device()
109 mtspr(SPR_DCBFR, cl); in arch_sync_dma_for_device()
113 for (cl = addr; cl < addr + size; in arch_sync_dma_for_device()
114 cl += cpuinfo->dcache_block_size) in arch_sync_dma_for_device()
115 mtspr(SPR_DCBIR, cl); in arch_sync_dma_for_device()
/arch/x86/math-emu/
Dwm_shrx.S50 shrd %cl,%ebx,%eax
51 shrd %cl,%edx,%ebx
52 shr %cl,%edx
64 subb $32,%cl
67 shrd %cl,%edx,%eax
68 shr %cl,%edx
79 subb $64,%cl
81 shr %cl,%eax
131 subb $32,%cl
135 shrd %cl,%eax,%ebx
[all …]
Dshr_Xsig.S39 shrd %cl,%ebx,%eax
40 shrd %cl,%edx,%ebx
41 shr %cl,%edx
54 subb $32,%cl
57 shrd %cl,%edx,%eax
58 shr %cl,%edx
70 subb $64,%cl
72 shr %cl,%eax
Dreg_u_sub.S83 shrd %cl,%ebx,%edx
84 shrd %cl,%eax,%ebx
85 shr %cl,%eax
92 subb $32,%cl
95 shrd %cl,%eax,%edx
96 shr %cl,%eax
223 shld %cl,%ebx,%eax
224 shld %cl,%edx,%ebx
225 shl %cl,%edx
Dround_Xsig.S56 shld %cl,%ebx,%edx
57 shld %cl,%eax,%ebx
58 shl %cl,%eax
127 shld %cl,%ebx,%edx
128 shld %cl,%eax,%ebx
129 shl %cl,%eax
Dreg_u_add.S83 shrd %cl,%ebx,%edx
84 shrd %cl,%eax,%ebx
85 shr %cl,%eax
92 subb $32,%cl
95 shrd %cl,%eax,%edx
96 shr %cl,%eax
Dreg_round.S476 testb CW_Underflow,%cl /* Underflow mask. */
500 shrd %cl,%ebx,%edx
501 shrd %cl,%eax,%ebx
502 shr %cl,%eax
510 subb $32,%cl
515 shrd %cl,%ebx,%edx
516 shrd %cl,%eax,%ebx
517 shr %cl,%eax
519 setne %cl
521 orb %cl,%bl
[all …]
Dreg_norm.S51 shld %cl,%eax,%edx
52 shl %cl,%eax
129 shld %cl,%eax,%edx
130 shl %cl,%eax
/arch/arm64/include/asm/
Datomic_lse.h30 #define ATOMIC_FETCH_OP(name, mb, op, asm_op, cl...) \ in ATOMIC_OP() argument
38 : cl); \ in ATOMIC_OP()
57 #define ATOMIC_OP_ADD_RETURN(name, mb, cl...) \ argument
68 : cl); \
90 #define ATOMIC_FETCH_OP_AND(name, mb, cl...) \ argument
99 : cl); \
121 #define ATOMIC_OP_SUB_RETURN(name, mb, cl...) \ argument
133 : cl); \
145 #define ATOMIC_FETCH_OP_SUB(name, mb, cl...) \ argument
154 : cl); \
[all …]
Datomic_ll_sc.h42 #define ATOMIC_OP_RETURN(name, mb, acq, rel, cl, op, asm_op, constraint)\ argument
58 : cl); \
63 #define ATOMIC_FETCH_OP(name, mb, acq, rel, cl, op, asm_op, constraint) \ argument
79 : cl); \
138 #define ATOMIC64_OP_RETURN(name, mb, acq, rel, cl, op, asm_op, constraint)\ argument
154 : cl); \
159 #define ATOMIC64_FETCH_OP(name, mb, acq, rel, cl, op, asm_op, constraint)\ argument
175 : cl); \
239 #define __CMPXCHG_CASE(w, sfx, name, sz, mb, acq, rel, cl, constraint) \ argument
268 : cl); \
[all …]
/arch/mips/lantiq/xway/
Dsysctrl.c320 clk->cl.dev_id = dev; in clkdev_add_pmu()
321 clk->cl.con_id = con; in clkdev_add_pmu()
322 clk->cl.clk = clk; in clkdev_add_pmu()
334 clkdev_add(&clk->cl); in clkdev_add_pmu()
345 clk->cl.dev_id = dev; in clkdev_add_cgu()
346 clk->cl.con_id = con; in clkdev_add_cgu()
347 clk->cl.clk = clk; in clkdev_add_cgu()
351 clkdev_add(&clk->cl); in clkdev_add_cgu()
364 clk->cl.dev_id = "17000000.pci"; in clkdev_add_pci()
365 clk->cl.con_id = NULL; in clkdev_add_pci()
[all …]
Dgptu.c127 clk->cl.dev_id = dev_name(dev); in clkdev_add_gptu()
128 clk->cl.con_id = con; in clkdev_add_gptu()
129 clk->cl.clk = clk; in clkdev_add_gptu()
133 clkdev_add(&clk->cl); in clkdev_add_gptu()
/arch/mips/kernel/
Dsmp-cps.c51 int cl, c, v; in cps_smp_setup() local
57 for (cl = 0; cl < nclusters; cl++) { in cps_smp_setup()
58 if (cl > 0) in cps_smp_setup()
62 ncores = mips_cps_numcores(cl); in cps_smp_setup()
64 core_vpes = core_vpe_count(cl, c); in cps_smp_setup()
71 if (!cl && !c) in cps_smp_setup()
75 cpu_set_cluster(&cpu_data[nvpes + v], cl); in cps_smp_setup()
/arch/x86/boot/compressed/
Dident_map_64.c222 char *cl, *start, *end; in clflush_page() local
238 for (cl = start; cl != end; cl += flush_size) in clflush_page()
239 clflush(cl); in clflush_page()
/arch/arm/boot/dts/
Dimx7d-sbc-imx7.dts13 #include "imx7d-cl-som-imx7.dts"
17 compatible = "compulab,sbc-imx7", "compulab,cl-som-imx7", "fsl,imx7d";
/arch/mips/lantiq/falcon/
Dsysctrl.c172 clk->cl.dev_id = dev; in clkdev_add_sys()
173 clk->cl.con_id = NULL; in clkdev_add_sys()
174 clk->cl.clk = clk; in clkdev_add_sys()
182 clkdev_add(&clk->cl); in clkdev_add_sys()
/arch/x86/kernel/
Drelocate_kernel_64.S259 testb $0x1, %cl /* is it a destination page? */
265 testb $0x2, %cl /* is it an indirection page? */
271 testb $0x4, %cl /* is it the done indicator? */
275 testb $0x8, %cl /* is it the source indicator? */
Drelocate_kernel_32.S240 testb $0x1, %cl /* is it a destination page */
246 testb $0x2, %cl /* is it an indirection page */
252 testb $0x4, %cl /* is it the done indicator */
256 testb $0x8, %cl /* is it the source indicator */
Dhead_32.S293 movb %al,%cl # save reg for future use
299 andb $0x0f,%cl # mask mask revision
300 movb %cl,X86_STEPPING
/arch/mips/lantiq/
Dclk.c92 clk->cl.dev_id, clk->cl.con_id, rate); in clk_set_rate()
Dclk.h59 struct clk_lookup cl; member
/arch/x86/boot/
Dedd.c112 ei->legacy_max_cylinder = oreg.ch + ((oreg.cl & 0xc0) << 2); in get_edd_info()
114 ei->legacy_sectors_per_track = oreg.cl & 0x3f; in get_edd_info()
/arch/powerpc/include/asm/
Dcmpxchg.h16 #define XCHG_GEN(type, sfx, cl) \ argument
35 : "cc", cl); \
40 #define CMPXCHG_GEN(type, sfx, br, br2, cl) \ argument
68 : "cc", cl); \
/arch/x86/include/asm/
Dasm.h69 #define _ASM_ARG3B cl
105 #define _ASM_ARG4B cl
/arch/x86/crypto/
Dblowfish-x86_64-asm_64.S36 #define RX2bl %cl
134 test %cl, %cl;

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