/arch/powerpc/boot/ |
D | oflib.c | 47 args.service = cpu_to_be32(ADDR(service)); in of_call_prom() 48 args.nargs = cpu_to_be32(nargs); in of_call_prom() 49 args.nret = cpu_to_be32(nret); in of_call_prom() 53 args.args[i] = cpu_to_be32(va_arg(list, prom_arg_t)); in of_call_prom() 72 args.service = cpu_to_be32(ADDR(service)); in of_call_prom_ret() 73 args.nargs = cpu_to_be32(nargs); in of_call_prom_ret() 74 args.nret = cpu_to_be32(nret); in of_call_prom_ret() 78 args.args[i] = cpu_to_be32(va_arg(list, prom_arg_t)); in of_call_prom_ret()
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D | xz_config.h | 23 #define cpu_to_be32(x) swab32(x) macro 30 #define cpu_to_be32(x) (x) macro 44 *((u32 *)p) = cpu_to_be32(val); in put_unaligned_be32()
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D | devtree.c | 41 memreg[i++] = cpu_to_be32(start >> 32); in dt_fixup_memory() 42 memreg[i++] = cpu_to_be32(start & 0xffffffff); in dt_fixup_memory() 44 memreg[i++] = cpu_to_be32(size >> 32); in dt_fixup_memory() 45 memreg[i++] = cpu_to_be32(size & 0xffffffff); in dt_fixup_memory() 73 setprop_val(devp, "clock-frequency", cpu_to_be32(cpu)); in dt_fixup_cpu_clocks() 74 setprop_val(devp, "timebase-frequency", cpu_to_be32(tb)); in dt_fixup_cpu_clocks() 76 setprop_val(devp, "bus-frequency", cpu_to_be32(bus)); in dt_fixup_cpu_clocks() 88 setprop_val(devp, "clock-frequency", cpu_to_be32(freq)); in dt_fixup_clock() 177 reg[i] = cpu_to_be32((u32)tmp); in add_reg()
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D | of.h | 32 #define cpu_to_be32(x) swab32(x) macro 39 #define cpu_to_be32(x) (x) macro
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D | libfdt_env.h | 23 #define cpu_to_fdt32(x) cpu_to_be32(x)
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/arch/powerpc/kernel/ |
D | prom_init.c | 397 args.service = cpu_to_be32(ADDR(service)); in call_prom() 398 args.nargs = cpu_to_be32(nargs); in call_prom() 399 args.nret = cpu_to_be32(nret); in call_prom() 403 args.args[i] = cpu_to_be32(va_arg(list, prom_arg_t)); in call_prom() 422 args.service = cpu_to_be32(ADDR(service)); in call_prom_ret() 423 args.nargs = cpu_to_be32(nargs); in call_prom_ret() 424 args.nret = cpu_to_be32(nret); in call_prom_ret() 428 args.args[i] = cpu_to_be32(va_arg(list, prom_arg_t)); in call_prom_ret() 983 .mask = cpu_to_be32(0xfffe0000), /* POWER5/POWER5+ */ 984 .val = cpu_to_be32(0x003a0000), [all …]
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D | rtas.c | 393 err_args.token = cpu_to_be32(rtas_last_error_token); in __fetch_rtas_last_error() 394 err_args.nargs = cpu_to_be32(2); in __fetch_rtas_last_error() 395 err_args.nret = cpu_to_be32(1); in __fetch_rtas_last_error() 396 err_args.args[0] = cpu_to_be32(__pa(rtas_err_buf)); in __fetch_rtas_last_error() 397 err_args.args[1] = cpu_to_be32(bufsz); in __fetch_rtas_last_error() 438 args->token = cpu_to_be32(token); in va_rtas_call_unlocked() 439 args->nargs = cpu_to_be32(nargs); in va_rtas_call_unlocked() 440 args->nret = cpu_to_be32(nret); in va_rtas_call_unlocked() 444 args->args[i] = cpu_to_be32(va_arg(list, __u32)); in va_rtas_call_unlocked() 1105 args.rets[0] = cpu_to_be32(RTAS_NOT_SUSPENDABLE); in SYSCALL_DEFINE1() [all …]
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D | paca.c | 113 .desc = cpu_to_be32(0xd397d781), /* "LpPa" */ in init_lppaca() 166 s->persistent = cpu_to_be32(SLB_NUM_BOLTED); in new_slb_shadow() 167 s->buffer_length = cpu_to_be32(sizeof(*s)); in new_slb_shadow()
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/arch/powerpc/crypto/ |
D | sha256-spe-glue.c | 165 dst[0] = cpu_to_be32(sctx->state[0]); in ppc_spe_sha256_final() 166 dst[1] = cpu_to_be32(sctx->state[1]); in ppc_spe_sha256_final() 167 dst[2] = cpu_to_be32(sctx->state[2]); in ppc_spe_sha256_final() 168 dst[3] = cpu_to_be32(sctx->state[3]); in ppc_spe_sha256_final() 169 dst[4] = cpu_to_be32(sctx->state[4]); in ppc_spe_sha256_final() 170 dst[5] = cpu_to_be32(sctx->state[5]); in ppc_spe_sha256_final() 171 dst[6] = cpu_to_be32(sctx->state[6]); in ppc_spe_sha256_final() 172 dst[7] = cpu_to_be32(sctx->state[7]); in ppc_spe_sha256_final()
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D | sha1-spe-glue.c | 143 dst[0] = cpu_to_be32(sctx->state[0]); in ppc_spe_sha1_final() 144 dst[1] = cpu_to_be32(sctx->state[1]); in ppc_spe_sha1_final() 145 dst[2] = cpu_to_be32(sctx->state[2]); in ppc_spe_sha1_final() 146 dst[3] = cpu_to_be32(sctx->state[3]); in ppc_spe_sha1_final() 147 dst[4] = cpu_to_be32(sctx->state[4]); in ppc_spe_sha1_final()
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/arch/mips/mti-malta/ |
D | malta-dtshim.c | 77 mem_array[0] = cpu_to_be32(PHYS_OFFSET); in gen_fdt_mem_array() 85 mem_array[1] = cpu_to_be32(size); in gen_fdt_mem_array() 90 mem_array[1] = cpu_to_be32(size_preio); in gen_fdt_mem_array() 109 mem_array[2] = cpu_to_be32(PHYS_OFFSET + SZ_512M); in gen_fdt_mem_array() 110 mem_array[3] = cpu_to_be32(size); in gen_fdt_mem_array() 122 mem_array[2] = cpu_to_be32(PHYS_OFFSET + SZ_2G + SZ_256M); in gen_fdt_mem_array() 123 mem_array[3] = cpu_to_be32(size); in gen_fdt_mem_array()
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/arch/powerpc/platforms/pseries/ |
D | vphn.c | 50 cpu_to_be32(last << 16 | new); in vphn_unpack_associativity() 58 cpu_to_be32(new & VPHN_FIELD_MASK); in vphn_unpack_associativity() 70 unpacked[0] = cpu_to_be32(nr_assoc_doms); in vphn_unpack_associativity()
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D | rtas-fadump.c | 70 fdm.header.dump_format_version = cpu_to_be32(0x00000001); in rtas_fadump_init_mem_struct() 74 cpu_to_be32((u32)offsetof(struct rtas_fadump_mem_struct, in rtas_fadump_init_mem_struct() 92 cpu_to_be32(RTAS_FADUMP_REQUEST_FLAG); in rtas_fadump_init_mem_struct() 102 fdm.hpte_region.request_flag = cpu_to_be32(RTAS_FADUMP_REQUEST_FLAG); in rtas_fadump_init_mem_struct() 112 fdm.rmr_region.request_flag = cpu_to_be32(RTAS_FADUMP_REQUEST_FLAG); in rtas_fadump_init_mem_struct()
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D | dlpar.c | 487 hp_elog->_drc_u.ic.count = cpu_to_be32(count); in dlpar_parse_id_type() 488 hp_elog->_drc_u.ic.index = cpu_to_be32(index); in dlpar_parse_id_type() 502 hp_elog->_drc_u.drc_index = cpu_to_be32(index); in dlpar_parse_id_type() 516 hp_elog->_drc_u.drc_count = cpu_to_be32(count); in dlpar_parse_id_type()
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/arch/mips/cavium-octeon/ |
D | octeon-platform.c | 910 f = cpu_to_be32(octeon_get_io_clock_rate()); in octeon_prune_device_tree() 988 __be32 width = cpu_to_be32(8); in octeon_prune_device_tree() 994 new_reg[0] = cpu_to_be32(cs); in octeon_prune_device_tree() 995 new_reg[1] = cpu_to_be32(0); in octeon_prune_device_tree() 996 new_reg[2] = cpu_to_be32(0x10000); in octeon_prune_device_tree() 997 new_reg[3] = cpu_to_be32(cs + 1); in octeon_prune_device_tree() 998 new_reg[4] = cpu_to_be32(0); in octeon_prune_device_tree() 999 new_reg[5] = cpu_to_be32(0x10000); in octeon_prune_device_tree() 1010 ranges[(cs * 5) + 2] = cpu_to_be32(region_base >> 32); in octeon_prune_device_tree() 1011 ranges[(cs * 5) + 3] = cpu_to_be32(region_base & 0xffffffff); in octeon_prune_device_tree() [all …]
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/arch/powerpc/mm/ |
D | drmem.c | 77 *p++ = cpu_to_be32(drmem_info->n_lmbs); in drmem_update_dt_v1() 83 dr_cell->drc_index = cpu_to_be32(lmb->drc_index); in drmem_update_dt_v1() 84 dr_cell->aa_index = cpu_to_be32(lmb->aa_index); in drmem_update_dt_v1() 85 dr_cell->flags = cpu_to_be32(drmem_lmb_flags(lmb)); in drmem_update_dt_v1() 98 dr_cell->drc_index = cpu_to_be32(lmb->drc_index); in init_drconf_v2_cell() 99 dr_cell->aa_index = cpu_to_be32(lmb->aa_index); in init_drconf_v2_cell() 100 dr_cell->flags = cpu_to_be32(drmem_lmb_flags(lmb)); in init_drconf_v2_cell() 135 *p++ = cpu_to_be32(lmb_sets); in drmem_update_dt_v2() 154 dr_cell->seq_lmbs = cpu_to_be32(seq_lmbs); in drmem_update_dt_v2() 167 dr_cell->seq_lmbs = cpu_to_be32(seq_lmbs); in drmem_update_dt_v2()
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/arch/powerpc/perf/ |
D | hv-common.c | 18 .counter_request = cpu_to_be32( in hv_perf_caps_get() 20 .starting_index = cpu_to_be32(-1), in hv_perf_caps_get()
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D | hv-gpci.c | 160 arg->params.counter_request = cpu_to_be32(req); in single_gpci_request() 161 arg->params.starting_index = cpu_to_be32(starting_index); in single_gpci_request() 367 arg->params.counter_request = cpu_to_be32(0x10); in hv_gpci_init()
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/arch/powerpc/kvm/ |
D | book3s_rtas.c | 40 args->rets[0] = cpu_to_be32(rc); in kvm_rtas_set_xive() 65 args->rets[1] = cpu_to_be32(server); in kvm_rtas_get_xive() 66 args->rets[2] = cpu_to_be32(priority); in kvm_rtas_get_xive() 68 args->rets[0] = cpu_to_be32(rc); in kvm_rtas_get_xive() 90 args->rets[0] = cpu_to_be32(rc); in kvm_rtas_int_off() 112 args->rets[0] = cpu_to_be32(rc); in kvm_rtas_int_on()
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/arch/um/drivers/ |
D | vector_transports.c | 73 *(uint32_t *) header = cpu_to_be32(L2TPV3_DATA_PACKET); in l2tpv3_form_header() 90 *counter = cpu_to_be32(td->counter); in l2tpv3_form_header() 109 *sequence = cpu_to_be32(++td->sequence); in gre_form_header() 274 td->rx_key = cpu_to_be32(temp_rx); in build_gre_transport_data() 275 td->tx_key = cpu_to_be32(temp_tx); in build_gre_transport_data() 336 td->tx_session = cpu_to_be32(temp_txs); in build_l2tpv3_transport_data() 337 td->rx_session = cpu_to_be32(temp_rxs); in build_l2tpv3_transport_data() 360 td->rx_cookie = cpu_to_be32(temp_rx); in build_l2tpv3_transport_data() 361 td->tx_cookie = cpu_to_be32(temp_tx); in build_l2tpv3_transport_data()
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/arch/powerpc/platforms/powernv/ |
D | vas-fault.c | 107 if ((entry->stamp.nx.pswid == cpu_to_be32(FIFO_INVALID_ENTRY)) in vas_fault_thread_fn() 108 || (entry->ccw & cpu_to_be32(CCW0_INVALID))) { in vas_fault_thread_fn() 120 entry->stamp.nx.pswid = cpu_to_be32(FIFO_INVALID_ENTRY); in vas_fault_thread_fn() 121 entry->ccw |= cpu_to_be32(CCW0_INVALID); in vas_fault_thread_fn()
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D | opal-core.c | 99 note->n_namesz = cpu_to_be32(namesz); in append_elf64_note() 100 note->n_descsz = cpu_to_be32(data_len); in append_elf64_note() 101 note->n_type = cpu_to_be32(type); in append_elf64_note() 122 prstatus->common.pr_pid = cpu_to_be32(100 + pir); in fill_prstatus() 123 prstatus->common.pr_ppid = cpu_to_be32(1); in fill_prstatus() 365 elf->e_version = cpu_to_be32(EV_CURRENT); in create_opalcore() 380 phdr->p_type = cpu_to_be32(PT_NOTE); in create_opalcore() 394 phdr->p_type = cpu_to_be32(PT_LOAD); in create_opalcore() 395 phdr->p_flags = cpu_to_be32(PF_R|PF_W|PF_X); in create_opalcore()
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/arch/powerpc/include/asm/ |
D | epapr_hcalls.h | 348 p[0] = cpu_to_be32(r5); in ev_byte_channel_receive() 349 p[1] = cpu_to_be32(r6); in ev_byte_channel_receive() 350 p[2] = cpu_to_be32(r7); in ev_byte_channel_receive() 351 p[3] = cpu_to_be32(r8); in ev_byte_channel_receive()
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/arch/mips/generic/ |
D | yamon-dt.c | 65 *(mem_array++) = cpu_to_be32(mr->start); in gen_fdt_mem_array() 66 *(mem_array++) = cpu_to_be32(size); in gen_fdt_mem_array()
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/arch/arm/mach-imx/ |
D | platsmp.c | 142 writel_relaxed(cpu_to_be32(paddr), dcfg_base + DCFG_CCSR_SCRATCHRW1); in ls1021a_smp_prepare_cpus()
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