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Searched refs:dcr_write (Results 1 – 5 of 5) sorted by relevance

/arch/powerpc/include/asm/
Ddcr.h32 #define dcr_write(host, dcr_n, value) dcr_write_generic(host, dcr_n, value) macro
42 #define dcr_write(host, dcr_n, value) dcr_write_native(host, dcr_n, value) macro
49 #define dcr_write(host, dcr_n, value) dcr_write_mmio(host, dcr_n, value) macro
/arch/powerpc/platforms/4xx/
Dpci.c898 dcr_write(port->dcrs, DCRO_PEGPL_SPECIAL, 0x68782800); in ppc440speA_pciex_init_utl()
1025 dcr_write(port->dcrs, DCRO_PEGPL_SPECIAL, 0x0); in ppc460ex_pciex_init_utl()
1325 dcr_write(port->dcrs, DCRO_PEGPL_CFG, 0x10000000); /* guarded on */ in ppc405ex_pciex_init_port_hw()
1334 dcr_write(port->dcrs, DCRO_PEGPL_SPECIAL, 0x0); in ppc405ex_pciex_init_utl()
1464 dcr_write(port->dcrs, DCRO_PEGPL_CFGBAH, in ppc4xx_pciex_port_init_mapping()
1466 dcr_write(port->dcrs, DCRO_PEGPL_CFGBAL, in ppc4xx_pciex_port_init_mapping()
1470 dcr_write(port->dcrs, DCRO_PEGPL_CFGMSK, 0xe0000001); in ppc4xx_pciex_port_init_mapping()
1473 dcr_write(port->dcrs, DCRO_PEGPL_REGBAH, in ppc4xx_pciex_port_init_mapping()
1475 dcr_write(port->dcrs, DCRO_PEGPL_REGBAL, in ppc4xx_pciex_port_init_mapping()
1479 dcr_write(port->dcrs, DCRO_PEGPL_REGMSK, 0x00007001); in ppc4xx_pciex_port_init_mapping()
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Dcpm.c70 dcr_write(cpm.dcr_host, cpm.dcr_offset[cpm_reg], value | mask); in cpm_set()
103 dcr_write(cpm.dcr_host, cpm.dcr_offset[CPM_ER], er_save); in cpm_idle_sleep()
/arch/powerpc/platforms/cell/
Daxon_msi.c89 dcr_write(msic->dcr_host, dcr_n, val); in msic_dcr_write()
/arch/powerpc/sysdev/
Dmpic.c197 dcr_write(rb->dhost, reg, value); in _mpic_write()