Searched refs:destination (Results 1 – 25 of 36) sorted by relevance
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| /arch/m68k/fpsp040/ |
| D | sto_res.S | 6 | users destination register then fp0 is moved to the
7 | correct floating-point destination register. fp0 and fp1
14 | Output: moves the result to the true destination reg or mem
16 | Modifies: destination floating point register
34 bfextu CMDREG1B(%a6){#13:#3},%d0 |extract cos destination
67 bfextu CMDREG1B(%a6){#6:#3},%d0 |extract destination register
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| D | x_ovfl.S | 10 | destination format.
15 | destination. If the instruction is not move_out, then the
16 | destination is not affected. For 68881 compatibility, the
17 | following values should be stored at the destination, based
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| D | x_snan.S | 171 | Store to the users destination address
174 beqs wrt_dn |destination is a data register
193 | Store to the users destination address
196 beqs wrt_dn |destination is a data register
215 | Store to the users destination address
218 beqs wrt_dn |destination is a data register
258 cmpib #3,%d0 |check for nan in destination
259 bnes issrc |destination nan has priority
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| D | x_unfl.S | 11 | it is equal to the denormalized exponent for the destination
13 | destination format.
224 | ;If destination format is sgl/dbl,
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| D | skeleton.S | 394 | a1 - user destination address
401 | the 68040 always reads the destination address and thus the page
439 | a1 - supervisor destination address
443 | destination address on the supervisor stack. Also like mem_write,
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| D | x_operr.S | 245 | is required to determine the destination.
277 movel EXC_EA(%a6),%a1 |put user destination address in a1
306 | with correct data written to the destination.
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| D | x_store.S | 83 bfextu %d0{#6:#3},%d0 |extract destination register
103 | a0 -> destination address
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| D | util.S | 164 | This sets the round precision according to the destination size.
169 | ;for fmovout, the destination format
325 | get destination format - this is the also the rounding precision
349 | For move out instructions (opclass 011) the destination format
433 | g_dfmtou --- put destination format in d0{1:0}
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| D | scale.S | 4 | The entry point sSCALE computes the destination operand
12 | Input: Double-extended destination operand in FPTEMP,
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| D | bugfix.S | 282 | locations on the stack. The correct destination register is in
408 | locations on the stack. The correct destination register is in
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| /arch/xtensa/boot/boot-redboot/ |
| D | bootstrap.S | 185 # a6 destination
186 # a7 maximum size of destination
199 # a6 destination start
200 # a7 maximum size of destination
203 # a10 destination end
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| /arch/mips/include/asm/ |
| D | uaccess.h | 412 #define __MODULE_JAL(destination) \ argument
414 __UA_LA "\t$1, " #destination "\n\t" \
418 #define __MODULE_JAL(destination) \ argument
419 "jal\t" #destination "\n\t"
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| /arch/powerpc/include/asm/ |
| D | epapr_hcalls.h | 137 uint32_t config, unsigned int priority, uint32_t destination) in ev_int_set_config() argument
149 r6 = destination; in ev_int_set_config()
169 uint32_t *config, unsigned int *priority, uint32_t *destination) in ev_int_get_config() argument
187 *destination = r6; in ev_int_get_config()
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| /arch/m68k/ifpsp060/ |
| D | os.S | 80 | a1 - user destination address
111 | a1 - supervisor destination address
237 | a0 - user destination address
259 | a0 - user destination address
283 | a0 - user destination address
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| D | CHANGES | 104 ADDRESS = Address of source or destination operand
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| /arch/arm/lib/ |
| D | csumpartial.S | 108 tst buf, #3 @ Test destination alignment
109 blne .Lnot_aligned @ align destination, return here
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| D | csumpartialcopygeneric.S | 95 tst dst, #3 @ Test destination alignment
96 blne .Ldst_unaligned @ align destination, return here
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| /arch/xtensa/kernel/ |
| D | head.S | 224 l32i a4, a2, 0 # start destination (in RAM)
225 l32i a5, a2, 4 # end destination (in RAM)
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| /arch/arm/boot/bootp/ |
| D | init.S | 77 .word initrd_phys @ destination initrd address
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| /arch/s390/kernel/ |
| D | relocate_kernel.S | 36 tml %r5,0x1 # is it a destination page?
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| /arch/microblaze/ |
| D | Kconfig.platform | 16 fine if both source and destination are aligned on the same
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| /arch/alpha/lib/ |
| D | ev6-memset.S | 88 subq $16,$3,$16 # E : $16 is new aligned destination
266 subq $16,$3,$16 # E : $16 is new aligned destination
454 subq $16,$3,$16 # E : $16 is new aligned destination
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| /arch/alpha/boot/ |
| D | bootpz.c | 48 extern int decompress_kernel(void* destination, void *source,
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| /arch/m68k/math-emu/ |
| D | fp_util.S | 95 | %a0 = destination (ptr to struct fp_ext)
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| /arch/arc/lib/ |
| D | memcpy-archs.S | 60 ;;; CASE 0: Both source and destination are 32bit aligned
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