Searched refs:esw (Results 1 – 10 of 10) sorted by relevance
| /arch/mips/include/asm/octeon/ |
| D | cvmx-sli-defs.h | 108 __BITFIELD_FIELD(uint64_t esw:2,
120 __BITFIELD_FIELD(uint64_t esw:2,
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| D | cvmx-npi-defs.h | 1562 uint64_t esw:2; member
1574 uint64_t esw:2;
1585 uint64_t esw:2; member
1597 uint64_t esw:2;
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| D | cvmx-npei-defs.h | 2889 uint64_t esw:2; member
2901 uint64_t esw:2;
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| /arch/s390/include/asm/ |
| D | cio.h | 243 } esw; member
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| /arch/mips/pci/ |
| D | pci-octeon.c | 600 mem_access.s.esw = 1; /* Endian-Swap on write. */ in octeon_pci_setup()
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| D | pcie-octeon.c | 893 mem_access_subid.s.esw = 1; /* Endian-swap for Writes. */ in __cvmx_pcie_rc_initialize_gen1()
1345 mem_access_subid.s.esw = 1; /* Endian-swap for Writes. */ in __cvmx_pcie_rc_initialize_gen2()
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| /arch/arm/boot/dts/ |
| D | mt7629.dtsi | 464 clock-names = "ethif", "sgmiitop", "esw", "gp0", "gp1",
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| D | mt2701.dtsi | 741 clock-names = "ethif", "esw", "gp1", "gp2", "trgpll";
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| D | mt7623.dtsi | 940 clock-names = "ethif", "esw", "gp1", "gp2", "trgpll";
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| /arch/arm64/boot/dts/mediatek/ |
| D | mt7622.dtsi | 934 clock-names = "ethif", "esw", "gp0", "gp1", "gp2",
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