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Searched refs:grpen0 (Results 1 – 5 of 5) sorted by relevance

/arch/arm64/kvm/
Dvgic-sys-reg-v3.c154 vmcr.grpen0 = (p->regval & ICC_IGRPEN0_EL1_MASK) >> in access_gic_grpen0()
158 p->regval = (vmcr.grpen0 << ICC_IGRPEN0_EL1_SHIFT) & in access_gic_grpen0()
/arch/arm64/kvm/vgic/
Dvgic-v2.c210 vmcr = (vmcrp->grpen0 << GICH_VMCR_ENABLE_GRP0_SHIFT) & in vgic_v2_set_vmcr()
239 vmcrp->grpen0 = (vmcr & GICH_VMCR_ENABLE_GRP0_MASK) >> in vgic_v2_get_vmcr()
Dvgic-mmio-v2.c274 val = vmcr.grpen0 << GIC_CPU_CTRL_EnableGrp0_SHIFT; in vgic_mmio_read_vcpuif()
321 vmcr.grpen0 = !!(val & GIC_CPU_CTRL_EnableGrp0); in vgic_mmio_write_vcpuif()
Dvgic-v3.c217 vmcr |= (vmcrp->grpen0 << ICH_VMCR_ENG0_SHIFT) & ICH_VMCR_ENG0_MASK; in vgic_v3_set_vmcr()
250 vmcrp->grpen0 = (vmcr & ICH_VMCR_ENG0_MASK) >> ICH_VMCR_ENG0_SHIFT; in vgic_v3_get_vmcr()
Dvgic.h136 u32 grpen0; member