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Searched refs:legacy (Results 1 – 25 of 78) sorted by relevance

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/arch/x86/kernel/
Dplatform-quirks.c10 x86_platform.legacy.i8042 = X86_LEGACY_I8042_EXPECTED_PRESENT; in x86_early_init_platform_quirks()
11 x86_platform.legacy.rtc = 1; in x86_early_init_platform_quirks()
12 x86_platform.legacy.warm_reset = 1; in x86_early_init_platform_quirks()
13 x86_platform.legacy.reserve_bios_regions = 0; in x86_early_init_platform_quirks()
14 x86_platform.legacy.devices.pnpbios = 1; in x86_early_init_platform_quirks()
18 x86_platform.legacy.reserve_bios_regions = 1; in x86_early_init_platform_quirks()
21 x86_platform.legacy.devices.pnpbios = 0; in x86_early_init_platform_quirks()
22 x86_platform.legacy.rtc = 0; in x86_early_init_platform_quirks()
26 x86_platform.legacy.devices.pnpbios = 0; in x86_early_init_platform_quirks()
27 x86_platform.legacy.rtc = 0; in x86_early_init_platform_quirks()
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Djailhouse.c214 x86_platform.legacy.rtc = 0; in jailhouse_init_platform()
215 x86_platform.legacy.warm_reset = 0; in jailhouse_init_platform()
216 x86_platform.legacy.i8042 = X86_LEGACY_I8042_PLATFORM_ABSENT; in jailhouse_init_platform()
Debda.c66 if (!x86_platform.legacy.reserve_bios_regions) in reserve_bios_regions()
/arch/arm/mach-ep93xx/
Dsnappercl15.c40 #define NAND_CTRL_ADDR(chip) (chip->legacy.IO_ADDR_W + 0x40)
67 chip->legacy.IO_ADDR_W); in snappercl15_nand_cmd_ctrl()
Dts72xx.c78 void __iomem *addr = chip->legacy.IO_ADDR_R; in ts72xx_nand_hwcontrol()
92 __raw_writeb(cmd, chip->legacy.IO_ADDR_W); in ts72xx_nand_hwcontrol()
97 void __iomem *addr = chip->legacy.IO_ADDR_R; in ts72xx_nand_device_ready()
/arch/arm/mach-omap1/
Dboard-nand.c31 writeb(cmd, this->legacy.IO_ADDR_W + mask); in omap1_nand_cmd_ctl()
/arch/mips/alchemy/devboards/
Ddb1550.c133 unsigned long ioaddr = (unsigned long)this->legacy.IO_ADDR_W; in au1550_nand_cmd_ctrl()
145 this->legacy.IO_ADDR_R = this->legacy.IO_ADDR_W = (void __iomem *)ioaddr; in au1550_nand_cmd_ctrl()
147 __raw_writeb(cmd, this->legacy.IO_ADDR_W); in au1550_nand_cmd_ctrl()
Ddb1300.c155 unsigned long ioaddr = (unsigned long)this->legacy.IO_ADDR_W; in au1300_nand_cmd_ctrl()
167 this->legacy.IO_ADDR_R = this->legacy.IO_ADDR_W = (void __iomem *)ioaddr; in au1300_nand_cmd_ctrl()
169 __raw_writeb(cmd, this->legacy.IO_ADDR_W); in au1300_nand_cmd_ctrl()
Ddb1200.c190 unsigned long ioaddr = (unsigned long)this->legacy.IO_ADDR_W; in au1200_nand_cmd_ctrl()
202 this->legacy.IO_ADDR_R = this->legacy.IO_ADDR_W = (void __iomem *)ioaddr; in au1200_nand_cmd_ctrl()
204 __raw_writeb(cmd, this->legacy.IO_ADDR_W); in au1200_nand_cmd_ctrl()
/arch/x86/pci/
DMakefile13 obj-y += legacy.o irq.o
/arch/x86/platform/olpc/
Dolpc-xo1-rtc.c75 x86_platform.legacy.rtc = 0; in xo1_rtc_init()
/arch/arm/boot/dts/
Dfacebook-bmc-flash-layout.dtsi36 * explicitly created to avoid breaking legacy applications.
Dfacebook-bmc-flash-layout-128.dtsi54 * explicitly created to avoid breaking legacy applications.
Dtwl4030_omap3.dtsi27 * pins we need to configure I2C4, or else use the legacy sys_nvmode1 and
Dast2400-facebook-netbmc-common.dtsi11 * the legacy applications.
Daspeed-bmc-facebook-yamp.dts14 * the legacy applications.
Domap443x.dtsi21 clock-latency = <300000>; /* From legacy driver */
/arch/x86/platform/intel-mid/
Dintel-mid.c61 x86_platform.legacy.rtc = 1; in intel_mid_arch_setup()
/arch/x86/xen/
Denlighten_hvm.c261 (x86_platform.legacy.rtc || !x86_platform.legacy.no_vga)) in xen_hvm_guest_late_init()
/arch/arm/mach-orion5x/
Dts78xx-setup.c144 writeb(cmd, this->legacy.IO_ADDR_W); in ts78xx_ts_nand_cmd_ctrl()
155 void __iomem *io_base = chip->legacy.IO_ADDR_W; in ts78xx_ts_nand_write_buf()
181 void __iomem *io_base = chip->legacy.IO_ADDR_R; in ts78xx_ts_nand_read_buf()
/arch/arm/mach-ixp4xx/
DKconfig58 bool "IXP4xx legacy PCI driver support"
61 Selects legacy PCI driver.
/arch/x86/include/asm/
Dx86_init.h287 struct x86_legacy_features legacy; member
/arch/sh/boards/mach-migor/
Dsetup.c176 writeb(cmd, chip->legacy.IO_ADDR_W + 0x00400000); in migor_nand_flash_cmd_ctl()
178 writeb(cmd, chip->legacy.IO_ADDR_W + 0x00800000); in migor_nand_flash_cmd_ctl()
180 writeb(cmd, chip->legacy.IO_ADDR_W); in migor_nand_flash_cmd_ctl()
/arch/powerpc/boot/dts/
Dcurrituck.dts148 * to invert PCIe legacy interrupts).
185 * to invert PCIe legacy interrupts).
222 * to invert PCIe legacy interrupts).
/arch/mips/generic/
DKconfig7 Select this from your board if the board must use a legacy, non-UHI,
28 development boards, which boot using a legacy boot protocol.

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