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/arch/x86/include/asm/
Dsyscall_wrapper.h85 #define __SYS_STUB0(abi, name) \ argument
86 long __##abi##_##name(const struct pt_regs *regs); \
87 ALLOW_ERROR_INJECTION(__##abi##_##name, ERRNO); \
88 long __##abi##_##name(const struct pt_regs *regs) \
89 __alias(__do_##name);
91 #define __SYS_STUBx(abi, name, ...) \ argument
92 long __##abi##_##name(const struct pt_regs *regs); \
93 ALLOW_ERROR_INJECTION(__##abi##_##name, ERRNO); \
94 long __##abi##_##name(const struct pt_regs *regs) \
96 return __se_##name(__VA_ARGS__); \
[all …]
Dstatic_call.h34 #define __ARCH_DEFINE_STATIC_CALL_TRAMP(name, insns) \ argument
37 ".globl " STATIC_CALL_TRAMP_STR(name) " \n" \
38 STATIC_CALL_TRAMP_STR(name) ": \n" \
40 ".type " STATIC_CALL_TRAMP_STR(name) ", @function \n" \
41 ".size " STATIC_CALL_TRAMP_STR(name) ", . - " STATIC_CALL_TRAMP_STR(name) " \n" \
44 #define ARCH_DEFINE_STATIC_CALL_TRAMP(name, func) \ argument
45 __ARCH_DEFINE_STATIC_CALL_TRAMP(name, ".byte 0xe9; .long " #func " - (. + 4)")
48 #define ARCH_DEFINE_STATIC_CALL_NULL_TRAMP(name) \ argument
49 __ARCH_DEFINE_STATIC_CALL_TRAMP(name, "jmp __x86_return_thunk")
51 #define ARCH_DEFINE_STATIC_CALL_NULL_TRAMP(name) \ argument
[all …]
Dvvar.h27 #define DECLARE_VVAR(offset, type, name) \ argument
28 EMIT_VVAR(name, offset)
34 #define DECLARE_VVAR(offset, type, name) \ argument
35 extern type vvar_ ## name[CS_BASES] \
37 extern type timens_ ## name[CS_BASES] \
40 #define VVAR(name) (vvar_ ## name) argument
41 #define TIMENS(name) (timens_ ## name) argument
43 #define DEFINE_VVAR(type, name) \ argument
44 type name[CS_BASES] \
45 __attribute__((section(".vvar_" #name), aligned(16))) __visible
/arch/powerpc/include/asm/
Dvdso.h20 #define VDSO64_SYMBOL(base, name) ((unsigned long)(base) + (vdso64_offset_##name)) argument
22 #define VDSO32_SYMBOL(base, name) ((unsigned long)(base) + (vdso32_offset_##name)) argument
29 #define V_FUNCTION_BEGIN(name) \ argument
30 .globl name; \
31 name: \
33 #define V_FUNCTION_END(name) \ argument
34 .size name,.-name;
36 #define V_LOCAL_FUNC(name) (name) argument
41 #define V_FUNCTION_BEGIN(name) \ argument
42 .globl name; \
[all …]
/arch/arm/mach-omap2/
Dclockdomains33xx_data.c26 .name = "l4ls_clkdm",
27 .pwrdm = { .name = "per_pwrdm" },
34 .name = "l3s_clkdm",
35 .pwrdm = { .name = "per_pwrdm" },
42 .name = "l4fw_clkdm",
43 .pwrdm = { .name = "per_pwrdm" },
50 .name = "l3_clkdm",
51 .pwrdm = { .name = "per_pwrdm" },
58 .name = "l4hs_clkdm",
59 .pwrdm = { .name = "per_pwrdm" },
[all …]
Dpowerdomains3xxx_data.c33 .name = "iva2_pwrdm",
50 .voltdm = { .name = "mpu_iva" },
54 .name = "mpu_pwrdm",
66 .voltdm = { .name = "mpu_iva" },
70 .name = "mpu_pwrdm",
82 .voltdm = { .name = "mpu_iva" },
96 .name = "core_pwrdm",
109 .voltdm = { .name = "core" },
113 .name = "core_pwrdm",
131 .voltdm = { .name = "core" },
[all …]
Dclockdomains43xx_data.c16 .name = "l4_cefuse_clkdm",
17 .pwrdm = { .name = "cefuse_pwrdm" },
25 .name = "mpu_clkdm",
26 .pwrdm = { .name = "mpu_pwrdm" },
34 .name = "l4ls_clkdm",
35 .pwrdm = { .name = "per_pwrdm" },
43 .name = "tamper_clkdm",
44 .pwrdm = { .name = "tamper_pwrdm" },
52 .name = "l4_rtc_clkdm",
53 .pwrdm = { .name = "rtc_pwrdm" },
[all …]
Dclockdomains81xx_data.c39 .name = "alwon_l3s_clkdm",
40 .pwrdm = { .name = "alwon_pwrdm" },
47 .name = "alwon_l3_med_clkdm",
48 .pwrdm = { .name = "alwon_pwrdm" },
55 .name = "alwon_l3_fast_clkdm",
56 .pwrdm = { .name = "alwon_pwrdm" },
63 .name = "alwon_ethernet_clkdm",
64 .pwrdm = { .name = "alwon_pwrdm" },
71 .name = "mmu_clkdm",
72 .pwrdm = { .name = "alwon_pwrdm" },
[all …]
Dclockdomains3xxx_data.c223 .name = "mpu_clkdm",
224 .pwrdm = { .name = "mpu_pwrdm" },
232 .name = "mpu_clkdm",
233 .pwrdm = { .name = "mpu_pwrdm" },
241 .name = "neon_clkdm",
242 .pwrdm = { .name = "neon_pwrdm" },
249 .name = "iva2_clkdm",
250 .pwrdm = { .name = "iva2_pwrdm" },
258 .name = "gfx_clkdm",
259 .pwrdm = { .name = "gfx_pwrdm" },
[all …]
Dclockdomains54xx_data.c165 .name = "l4sec_clkdm",
166 .pwrdm = { .name = "core_pwrdm" },
177 .name = "iva_clkdm",
178 .pwrdm = { .name = "iva_pwrdm" },
189 .name = "mipiext_clkdm",
190 .pwrdm = { .name = "core_pwrdm" },
200 .name = "l3main2_clkdm",
201 .pwrdm = { .name = "core_pwrdm" },
210 .name = "l3main1_clkdm",
211 .pwrdm = { .name = "core_pwrdm" },
[all …]
Dpowerdomains44xx_data.c32 .name = "core_pwrdm",
33 .voltdm = { .name = "core" },
58 .name = "gfx_pwrdm",
59 .voltdm = { .name = "core" },
75 .name = "abe_pwrdm",
76 .voltdm = { .name = "iva" },
95 .name = "dss_pwrdm",
96 .voltdm = { .name = "core" },
113 .name = "tesla_pwrdm",
114 .voltdm = { .name = "iva" },
[all …]
Dclockdomains44xx_data.c154 .name = "l4_cefuse_clkdm",
155 .pwrdm = { .name = "cefuse_pwrdm" },
163 .name = "l4_cfg_clkdm",
164 .pwrdm = { .name = "core_pwrdm" },
173 .name = "tesla_clkdm",
174 .pwrdm = { .name = "tesla_pwrdm" },
185 .name = "l3_gfx_clkdm",
186 .pwrdm = { .name = "gfx_pwrdm" },
197 .name = "ivahd_clkdm",
198 .pwrdm = { .name = "ivahd_pwrdm" },
[all …]
Dclockdomains7xx_data.c313 .name = "l4per3_clkdm",
314 .pwrdm = { .name = "l4per_pwrdm" },
323 .name = "l4per2_clkdm",
324 .pwrdm = { .name = "l4per_pwrdm" },
335 .name = "mpu0_clkdm",
336 .pwrdm = { .name = "cpu0_pwrdm" },
344 .name = "iva_clkdm",
345 .pwrdm = { .name = "iva_pwrdm" },
356 .name = "coreaon_clkdm",
357 .pwrdm = { .name = "coreaon_pwrdm" },
[all …]
Dpowerdomains54xx_data.c30 .name = "core_pwrdm",
31 .voltdm = { .name = "core" },
56 .name = "abe_pwrdm",
57 .voltdm = { .name = "core" },
76 .name = "coreaon_pwrdm",
77 .voltdm = { .name = "core" },
85 .name = "dss_pwrdm",
86 .voltdm = { .name = "core" },
103 .name = "cpu0_pwrdm",
104 .voltdm = { .name = "mpu" },
[all …]
Dclockdomains2420_data.c80 .name = "mpu_clkdm",
81 .pwrdm = { .name = "mpu_pwrdm" },
88 .name = "iva1_clkdm",
89 .pwrdm = { .name = "dsp_pwrdm" },
97 .name = "dsp_clkdm",
98 .pwrdm = { .name = "dsp_pwrdm" },
104 .name = "gfx_clkdm",
105 .pwrdm = { .name = "gfx_pwrdm" },
112 .name = "core_l3_clkdm",
113 .pwrdm = { .name = "core_pwrdm" },
[all …]
/arch/mips/bcm63xx/boards/
Dboard_bcm963xx.c41 .name = "CVG834G_E15R3921",
58 .name = "CVG834G:green:power",
71 .name = "96328avng",
85 .name = "96328avng::ppp-fail",
90 .name = "96328avng::power",
96 .name = "96328avng::power-fail",
101 .name = "96328avng::wps",
106 .name = "96328avng::ppp",
119 .name = "96338GW",
133 .name = "adsl",
[all …]
/arch/arm64/include/asm/
Dsyscall_wrapper.h20 #define COMPAT_SYSCALL_DEFINEx(x, name, ...) \ argument
21 asmlinkage long __arm64_compat_sys##name(const struct pt_regs *regs); \
22 ALLOW_ERROR_INJECTION(__arm64_compat_sys##name, ERRNO); \
23 static long __se_compat_sys##name(__MAP(x,__SC_LONG,__VA_ARGS__)); \
24 static inline long __do_compat_sys##name(__MAP(x,__SC_DECL,__VA_ARGS__)); \
25 asmlinkage long __arm64_compat_sys##name(const struct pt_regs *regs) \
27 return __se_compat_sys##name(SC_ARM64_REGS_TO_ARGS(x,__VA_ARGS__)); \
29 static long __se_compat_sys##name(__MAP(x,__SC_LONG,__VA_ARGS__)) \
31 return __do_compat_sys##name(__MAP(x,__SC_DELOUSE,__VA_ARGS__)); \
33 static inline long __do_compat_sys##name(__MAP(x,__SC_DECL,__VA_ARGS__))
[all …]
/arch/mips/include/asm/
Dmips-cps.h16 #define CPS_ACCESSOR_A(unit, off, name) \ argument
17 static inline void *addr_##unit##_##name(void) \
22 #define CPS_ACCESSOR_R(unit, sz, name) \ argument
23 static inline uint##sz##_t read_##unit##_##name(void) \
29 return __raw_readl(addr_##unit##_##name()); \
33 return __raw_readq(addr_##unit##_##name()); \
35 val64 = __raw_readl(addr_##unit##_##name() + 4); \
37 val64 |= __raw_readl(addr_##unit##_##name()); \
45 #define CPS_ACCESSOR_W(unit, sz, name) \ argument
46 static inline void write_##unit##_##name(uint##sz##_t val) \
[all …]
Dmips-gic.h30 #define GIC_ACCESSOR_RO(sz, off, name) \ argument
31 CPS_ACCESSOR_RO(gic, sz, MIPS_GIC_SHARED_OFS + off, name)
34 #define GIC_ACCESSOR_RW(sz, off, name) \ argument
35 CPS_ACCESSOR_RW(gic, sz, MIPS_GIC_SHARED_OFS + off, name)
38 #define GIC_VX_ACCESSOR_RO(sz, off, name) \ argument
39 CPS_ACCESSOR_RO(gic, sz, MIPS_GIC_LOCAL_OFS + off, vl_##name) \
40 CPS_ACCESSOR_RO(gic, sz, MIPS_GIC_REDIR_OFS + off, vo_##name)
43 #define GIC_VX_ACCESSOR_RW(sz, off, name) \ argument
44 CPS_ACCESSOR_RW(gic, sz, MIPS_GIC_LOCAL_OFS + off, vl_##name) \
45 CPS_ACCESSOR_RW(gic, sz, MIPS_GIC_REDIR_OFS + off, vo_##name)
[all …]
/arch/powerpc/xmon/
Dansidecl.h98 #define EXFUN(name, proto) name proto argument
99 #define DEFUN(name, arglist, args) name(args) argument
100 #define DEFUN_VOID(name) name(void) argument
102 #define PROTO(type, name, arglist) type name arglist argument
122 #define EXFUN(name, proto) name() argument
123 #define DEFUN(name, arglist, args) name arglist args; argument
124 #define DEFUN_VOID(name) name() argument
125 #define PROTO(type, name, arglist) type name () argument
/arch/s390/include/asm/
Dsyscall_wrapper.h59 #define __S390_SYS_STUBx(x, name, ...) \ argument
60 long __s390_sys##name(struct pt_regs *regs); \
61 ALLOW_ERROR_INJECTION(__s390_sys##name, ERRNO); \
62 long __s390_sys##name(struct pt_regs *regs) \
64 long ret = __do_sys##name(SYSCALL_PT_ARGS(x, regs, \
88 #define COND_SYSCALL(name) \ argument
89 cond_syscall(__s390x_sys_##name); \
90 cond_syscall(__s390_sys_##name)
92 #define SYS_NI(name) \ argument
93 SYSCALL_ALIAS(__s390x_sys_##name, sys_ni_posix_timers); \
[all …]
/arch/mips/ar7/
Dplatform.c90 .name = "regs",
96 .name = "irq",
102 .name = "mem",
108 .name = "devirq",
117 .name = "regs",
123 .name = "irq",
129 .name = "mem",
135 .name = "devirq",
162 .name = "vlynq",
172 .name = "vlynq",
[all …]
/arch/arm/mach-pxa/
Dstargate2.c147 .name = "sht15",
185 .name = "vcc_bbio",
192 .name = "vcc_bb",
199 .name = "vcc_pxa_flash",
207 .name = "vcc_cc2420",
214 .name = "vcc_vref",
221 .name = "vcc_sram_ext",
228 .name = "vcc_mica",
235 .name = "vcc_bt",
242 .name = "vcc_lcd",
[all …]
/arch/arm/mach-s3c/
Diic-core.h18 static inline void s3c_i2c0_setname(char *name) in s3c_i2c0_setname() argument
21 s3c_device_i2c0.name = name; in s3c_i2c0_setname()
24 static inline void s3c_i2c1_setname(char *name) in s3c_i2c1_setname() argument
27 s3c_device_i2c1.name = name; in s3c_i2c1_setname()
31 static inline void s3c_i2c2_setname(char *name) in s3c_i2c2_setname() argument
34 s3c_device_i2c2.name = name; in s3c_i2c2_setname()
/arch/powerpc/kvm/
Dfpu.S27 #define FPS_ONE_IN(name) \ argument
28 _GLOBAL(fps_ ## name); \
33 name 0,0; \
48 #define FPS_TWO_IN(name) \ argument
49 _GLOBAL(fps_ ## name); \
55 name 0,0,1; \
71 #define FPS_THREE_IN(name) \ argument
72 _GLOBAL(fps_ ## name); \
79 name 0,0,1,2; \
149 #define FPD_NONE_IN(name) \ argument
[all …]

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