Home
last modified time | relevance | path

Searched refs:nr (Results 1 – 25 of 386) sorted by relevance

12345678910>>...16

/arch/m68k/include/asm/
Dbitops.h31 static inline void bset_reg_set_bit(int nr, volatile unsigned long *vaddr) in bset_reg_set_bit() argument
33 char *p = (char *)vaddr + (nr ^ 31) / 8; in bset_reg_set_bit()
37 : "a" (p), "di" (nr & 7) in bset_reg_set_bit()
41 static inline void bset_mem_set_bit(int nr, volatile unsigned long *vaddr) in bset_mem_set_bit() argument
43 char *p = (char *)vaddr + (nr ^ 31) / 8; in bset_mem_set_bit()
47 : "di" (nr & 7)); in bset_mem_set_bit()
50 static inline void bfset_mem_set_bit(int nr, volatile unsigned long *vaddr) in bfset_mem_set_bit() argument
54 : "d" (nr ^ 31), "o" (*vaddr) in bfset_mem_set_bit()
59 #define set_bit(nr, vaddr) bset_reg_set_bit(nr, vaddr) argument
61 #define set_bit(nr, vaddr) bset_mem_set_bit(nr, vaddr) argument
[all …]
Draw_io.h110 unsigned int nr) in raw_outsb() argument
114 if (nr & 15) { in raw_outsb()
115 tmp = (nr & 15) - 1; in raw_outsb()
122 if (nr >> 4) { in raw_outsb()
123 tmp = (nr >> 4) - 1; in raw_outsb()
149 static inline void raw_insw(volatile u16 __iomem *port, u16 *buf, unsigned int nr) in raw_insw() argument
153 if (nr & 15) { in raw_insw()
154 tmp = (nr & 15) - 1; in raw_insw()
161 if (nr >> 4) { in raw_insw()
162 tmp = (nr >> 4) - 1; in raw_insw()
[all …]
/arch/sh/include/asm/
Dbitops-op32.h12 #define BYTE_NUMBER(nr) ((nr ^ BITOP_LE_SWIZZLE) / BITS_PER_BYTE) argument
13 #define BYTE_OFFSET(nr) ((nr ^ BITOP_LE_SWIZZLE) % BITS_PER_BYTE) argument
15 #define BYTE_NUMBER(nr) ((nr) / BITS_PER_BYTE) argument
16 #define BYTE_OFFSET(nr) ((nr) % BITS_PER_BYTE) argument
19 static inline void __set_bit(int nr, volatile unsigned long *addr) in __set_bit() argument
21 if (__builtin_constant_p(nr)) { in __set_bit()
25 : "i" (BYTE_OFFSET(nr)), "i" (BYTE_NUMBER(nr)) in __set_bit()
29 unsigned long mask = BIT_MASK(nr); in __set_bit()
30 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); in __set_bit()
36 static inline void __clear_bit(int nr, volatile unsigned long *addr) in __clear_bit() argument
[all …]
Dbitops-grb.h5 static inline void set_bit(int nr, volatile void * addr) in set_bit() argument
11 a += nr >> 5; in set_bit()
12 mask = 1 << (nr & 0x1f); in set_bit()
29 static inline void clear_bit(int nr, volatile void * addr) in clear_bit() argument
35 a += nr >> 5; in clear_bit()
36 mask = ~(1 << (nr & 0x1f)); in clear_bit()
52 static inline void change_bit(int nr, volatile void * addr) in change_bit() argument
58 a += nr >> 5; in change_bit()
59 mask = 1 << (nr & 0x1f); in change_bit()
75 static inline int test_and_set_bit(int nr, volatile void * addr) in test_and_set_bit() argument
[all …]
Dbitops-llsc.h5 static inline void set_bit(int nr, volatile void *addr) in set_bit() argument
11 a += nr >> 5; in set_bit()
12 mask = 1 << (nr & 0x1f); in set_bit()
26 static inline void clear_bit(int nr, volatile void *addr) in clear_bit() argument
32 a += nr >> 5; in clear_bit()
33 mask = 1 << (nr & 0x1f); in clear_bit()
47 static inline void change_bit(int nr, volatile void *addr) in change_bit() argument
53 a += nr >> 5; in change_bit()
54 mask = 1 << (nr & 0x1f); in change_bit()
68 static inline int test_and_set_bit(int nr, volatile void *addr) in test_and_set_bit() argument
[all …]
Dbitops-cas.h14 static inline void set_bit(int nr, volatile void *addr) in set_bit() argument
19 a += nr >> 5; in set_bit()
20 mask = 1U << (nr & 0x1f); in set_bit()
26 static inline void clear_bit(int nr, volatile void *addr) in clear_bit() argument
31 a += nr >> 5; in clear_bit()
32 mask = 1U << (nr & 0x1f); in clear_bit()
38 static inline void change_bit(int nr, volatile void *addr) in change_bit() argument
43 a += nr >> 5; in change_bit()
44 mask = 1U << (nr & 0x1f); in change_bit()
50 static inline int test_and_set_bit(int nr, volatile void *addr) in test_and_set_bit() argument
[all …]
/arch/s390/include/asm/
Dbitops.h45 __bitops_word(unsigned long nr, const volatile unsigned long *ptr) in __bitops_word() argument
49 addr = (unsigned long)ptr + ((nr ^ (nr & (BITS_PER_LONG - 1))) >> 3); in __bitops_word()
53 static inline unsigned long __bitops_mask(unsigned long nr) in __bitops_mask() argument
55 return 1UL << (nr & (BITS_PER_LONG - 1)); in __bitops_mask()
58 static __always_inline void arch_set_bit(unsigned long nr, volatile unsigned long *ptr) in arch_set_bit() argument
60 unsigned long *addr = __bitops_word(nr, ptr); in arch_set_bit()
61 unsigned long mask = __bitops_mask(nr); in arch_set_bit()
66 static __always_inline void arch_clear_bit(unsigned long nr, volatile unsigned long *ptr) in arch_clear_bit() argument
68 unsigned long *addr = __bitops_word(nr, ptr); in arch_clear_bit()
69 unsigned long mask = __bitops_mask(nr); in arch_clear_bit()
[all …]
Dfacility.h21 static inline void __set_facility(unsigned long nr, void *facilities) in __set_facility() argument
25 if (nr >= MAX_FACILITY_BIT) in __set_facility()
27 ptr[nr >> 3] |= 0x80 >> (nr & 7); in __set_facility()
30 static inline void __clear_facility(unsigned long nr, void *facilities) in __clear_facility() argument
34 if (nr >= MAX_FACILITY_BIT) in __clear_facility()
36 ptr[nr >> 3] &= ~(0x80 >> (nr & 7)); in __clear_facility()
39 static inline int __test_facility(unsigned long nr, void *facilities) in __test_facility() argument
43 if (nr >= MAX_FACILITY_BIT) in __test_facility()
45 ptr = (unsigned char *) facilities + (nr >> 3); in __test_facility()
46 return (*ptr & (0x80 >> (nr & 7))) != 0; in __test_facility()
[all …]
Debcdic.h23 codepage_convert(const __u8 *codepage, volatile char *addr, unsigned long nr) in codepage_convert() argument
25 if (nr-- <= 0) in codepage_convert()
35 : "+&a" (addr), "+&a" (nr) in codepage_convert()
39 #define ASCEBC(addr,nr) codepage_convert(_ascebc, addr, nr) argument
40 #define EBCASC(addr,nr) codepage_convert(_ebcasc, addr, nr) argument
41 #define ASCEBC_500(addr,nr) codepage_convert(_ascebc_500, addr, nr) argument
42 #define EBCASC_500(addr,nr) codepage_convert(_ebcasc_500, addr, nr) argument
43 #define EBC_TOLOWER(addr,nr) codepage_convert(_ebc_tolower, addr, nr) argument
44 #define EBC_TOUPPER(addr,nr) codepage_convert(_ebc_toupper, addr, nr) argument
/arch/x86/include/asm/
Dbitops.h48 #define CONST_MASK_ADDR(nr, addr) WBYTE_ADDR((void *)(addr) + ((nr)>>3)) argument
49 #define CONST_MASK(nr) (1 << ((nr) & 7)) argument
52 arch_set_bit(long nr, volatile unsigned long *addr) in arch_set_bit() argument
54 if (__builtin_constant_p(nr)) { in arch_set_bit()
56 : CONST_MASK_ADDR(nr, addr) in arch_set_bit()
57 : "iq" (CONST_MASK(nr)) in arch_set_bit()
61 : : RLONG_ADDR(addr), "Ir" (nr) : "memory"); in arch_set_bit()
66 arch___set_bit(long nr, volatile unsigned long *addr) in arch___set_bit() argument
68 asm volatile(__ASM_SIZE(bts) " %1,%0" : : ADDR, "Ir" (nr) : "memory"); in arch___set_bit()
72 arch_clear_bit(long nr, volatile unsigned long *addr) in arch_clear_bit() argument
[all …]
Dsync_bitops.h32 static inline void sync_set_bit(long nr, volatile unsigned long *addr) in sync_set_bit() argument
36 : "Ir" (nr) in sync_set_bit()
50 static inline void sync_clear_bit(long nr, volatile unsigned long *addr) in sync_clear_bit() argument
54 : "Ir" (nr) in sync_clear_bit()
67 static inline void sync_change_bit(long nr, volatile unsigned long *addr) in sync_change_bit() argument
71 : "Ir" (nr) in sync_change_bit()
83 static inline bool sync_test_and_set_bit(long nr, volatile unsigned long *addr) in sync_test_and_set_bit() argument
85 return GEN_BINARY_RMWcc("lock; " __ASM_SIZE(bts), *addr, c, "Ir", nr); in sync_test_and_set_bit()
96 static inline int sync_test_and_clear_bit(long nr, volatile unsigned long *addr) in sync_test_and_clear_bit() argument
98 return GEN_BINARY_RMWcc("lock; " __ASM_SIZE(btr), *addr, c, "Ir", nr); in sync_test_and_clear_bit()
[all …]
/arch/hexagon/include/asm/
Dbitops.h31 static inline int test_and_clear_bit(int nr, volatile void *addr) in test_and_clear_bit() argument
43 : "r" (addr), "r" (nr) in test_and_clear_bit()
55 static inline int test_and_set_bit(int nr, volatile void *addr) in test_and_set_bit() argument
67 : "r" (addr), "r" (nr) in test_and_set_bit()
81 static inline int test_and_change_bit(int nr, volatile void *addr) in test_and_change_bit() argument
93 : "r" (addr), "r" (nr) in test_and_change_bit()
106 static inline void clear_bit(int nr, volatile void *addr) in clear_bit() argument
108 test_and_clear_bit(nr, addr); in clear_bit()
111 static inline void set_bit(int nr, volatile void *addr) in set_bit() argument
113 test_and_set_bit(nr, addr); in set_bit()
[all …]
/arch/riscv/include/asm/
Dbitops.h37 #define __test_and_op_bit_ord(op, mod, nr, addr, ord) \ argument
40 __mask = BIT_MASK(nr); \
43 : "=r" (__res), "+A" (addr[BIT_WORD(nr)]) \
49 #define __op_bit_ord(op, mod, nr, addr, ord) \ argument
52 : "+A" (addr[BIT_WORD(nr)]) \
53 : "r" (mod(BIT_MASK(nr))) \
56 #define __test_and_op_bit(op, mod, nr, addr) \ argument
57 __test_and_op_bit_ord(op, mod, nr, addr, .aqrl)
58 #define __op_bit(op, mod, nr, addr) \ argument
59 __op_bit_ord(op, mod, nr, addr, )
[all …]
/arch/alpha/include/asm/
Dbitops.h29 set_bit(unsigned long nr, volatile void * addr) in set_bit() argument
32 int *m = ((int *) addr) + (nr >> 5); in set_bit()
43 :"Ir" (1UL << (nr & 31)), "m" (*m)); in set_bit()
50 __set_bit(unsigned long nr, volatile void * addr) in __set_bit() argument
52 int *m = ((int *) addr) + (nr >> 5); in __set_bit()
54 *m |= 1 << (nr & 31); in __set_bit()
58 clear_bit(unsigned long nr, volatile void * addr) in clear_bit() argument
61 int *m = ((int *) addr) + (nr >> 5); in clear_bit()
72 :"Ir" (1UL << (nr & 31)), "m" (*m)); in clear_bit()
76 clear_bit_unlock(unsigned long nr, volatile void * addr) in clear_bit_unlock() argument
[all …]
/arch/h8300/include/asm/
Dbitops.h45 static inline void FNAME(int nr, volatile unsigned long *addr) \
48 unsigned char bit = nr & 7; \
50 b_addr = (unsigned char *)addr + ((nr >> 3) ^ 3); \
51 if (__builtin_constant_p(nr)) { \
52 __asm__(OP " %1,%0" : "+WU"(*b_addr) : "i"(nr & 7)); \
61 #define __set_bit(nr, addr) set_bit((nr), (addr)) argument
62 #define __clear_bit(nr, addr) clear_bit((nr), (addr)) argument
63 #define __change_bit(nr, addr) change_bit((nr), (addr)) argument
67 static inline int test_bit(int nr, const volatile unsigned long *addr) in test_bit() argument
71 unsigned char bit = nr & 7; in test_bit()
[all …]
/arch/arm/include/asm/
Dsync_bitops.h21 #define sync_set_bit(nr, p) _set_bit(nr, p) argument
22 #define sync_clear_bit(nr, p) _clear_bit(nr, p) argument
23 #define sync_change_bit(nr, p) _change_bit(nr, p) argument
24 #define sync_test_bit(nr, addr) test_bit(nr, addr) argument
30 int _sync_test_and_set_bit(int nr, volatile unsigned long * p);
31 #define sync_test_and_set_bit(nr, p) _sync_test_and_set_bit(nr, p) argument
33 int _sync_test_and_clear_bit(int nr, volatile unsigned long * p);
34 #define sync_test_and_clear_bit(nr, p) _sync_test_and_clear_bit(nr, p) argument
36 int _sync_test_and_change_bit(int nr, volatile unsigned long * p);
37 #define sync_test_and_change_bit(nr, p) _sync_test_and_change_bit(nr, p) argument
/arch/sparc/include/uapi/asm/
Dioctl.h39 #define _IOC(dir,type,nr,size) \ argument
42 ((nr) << _IOC_NRSHIFT) | \
45 #define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0) argument
46 #define _IOR(type,nr,size) _IOC(_IOC_READ,(type),(nr),sizeof(size)) argument
47 #define _IOW(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),sizeof(size)) argument
48 #define _IOWR(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size)) argument
51 #define _IOC_DIR(nr) \ argument
52 ( (((((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) & (_IOC_WRITE|_IOC_READ)) != 0)? \
53 (((nr) >> _IOC_DIRSHIFT) & (_IOC_WRITE|_IOC_READ)): \
54 (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) )
[all …]
/arch/ia64/include/asm/
Dbitops.h40 set_bit (int nr, volatile void *addr) in set_bit() argument
46 m = (volatile __u32 *) addr + (nr >> 5); in set_bit()
47 bit = 1 << (nr & 31); in set_bit()
65 __set_bit (int nr, volatile void *addr) in __set_bit() argument
67 *((__u32 *) addr + (nr >> 5)) |= (1 << (nr & 31)); in __set_bit()
81 clear_bit (int nr, volatile void *addr) in clear_bit() argument
87 m = (volatile __u32 *) addr + (nr >> 5); in clear_bit()
88 mask = ~(1 << (nr & 31)); in clear_bit()
105 clear_bit_unlock (int nr, volatile void *addr) in clear_bit_unlock() argument
111 m = (volatile __u32 *) addr + (nr >> 5); in clear_bit_unlock()
[all …]
/arch/arm64/include/asm/
Dsync_bitops.h18 #define sync_set_bit(nr, p) set_bit(nr, p) argument
19 #define sync_clear_bit(nr, p) clear_bit(nr, p) argument
20 #define sync_change_bit(nr, p) change_bit(nr, p) argument
21 #define sync_test_and_set_bit(nr, p) test_and_set_bit(nr, p) argument
22 #define sync_test_and_clear_bit(nr, p) test_and_clear_bit(nr, p) argument
23 #define sync_test_and_change_bit(nr, p) test_and_change_bit(nr, p) argument
24 #define sync_test_bit(nr, addr) test_bit(nr, addr) argument
/arch/sparc/include/asm/
Dbitops_32.h32 static inline int test_and_set_bit(unsigned long nr, volatile unsigned long *addr) in test_and_set_bit() argument
36 ADDR = ((unsigned long *) addr) + (nr >> 5); in test_and_set_bit()
37 mask = 1 << (nr & 31); in test_and_set_bit()
42 static inline void set_bit(unsigned long nr, volatile unsigned long *addr) in set_bit() argument
46 ADDR = ((unsigned long *) addr) + (nr >> 5); in set_bit()
47 mask = 1 << (nr & 31); in set_bit()
52 static inline int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr) in test_and_clear_bit() argument
56 ADDR = ((unsigned long *) addr) + (nr >> 5); in test_and_clear_bit()
57 mask = 1 << (nr & 31); in test_and_clear_bit()
62 static inline void clear_bit(unsigned long nr, volatile unsigned long *addr) in clear_bit() argument
[all …]
/arch/mips/include/asm/
Dbitops.h69 void __mips_set_bit(unsigned long nr, volatile unsigned long *addr);
70 void __mips_clear_bit(unsigned long nr, volatile unsigned long *addr);
71 void __mips_change_bit(unsigned long nr, volatile unsigned long *addr);
72 int __mips_test_and_set_bit_lock(unsigned long nr,
74 int __mips_test_and_clear_bit(unsigned long nr,
76 int __mips_test_and_change_bit(unsigned long nr,
90 static inline void set_bit(unsigned long nr, volatile unsigned long *addr) in set_bit() argument
92 volatile unsigned long *m = &addr[BIT_WORD(nr)]; in set_bit()
93 int bit = nr % BITS_PER_LONG; in set_bit()
96 __mips_set_bit(nr, addr); in set_bit()
[all …]
/arch/alpha/include/uapi/asm/
Dioctl.h40 #define _IOC(dir,type,nr,size) \ argument
44 ((nr) << _IOC_NRSHIFT) | \
48 #define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0) argument
49 #define _IOR(type,nr,size) _IOC(_IOC_READ,(type),(nr),sizeof(size)) argument
50 #define _IOW(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),sizeof(size)) argument
51 #define _IOWR(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size)) argument
54 #define _IOC_DIR(nr) (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) argument
55 #define _IOC_TYPE(nr) (((nr) >> _IOC_TYPESHIFT) & _IOC_TYPEMASK) argument
56 #define _IOC_NR(nr) (((nr) >> _IOC_NRSHIFT) & _IOC_NRMASK) argument
57 #define _IOC_SIZE(nr) (((nr) >> _IOC_SIZESHIFT) & _IOC_SIZEMASK) argument
/arch/openrisc/include/asm/bitops/
Datomic.h12 static inline void set_bit(int nr, volatile unsigned long *addr) in set_bit() argument
14 unsigned long mask = BIT_MASK(nr); in set_bit()
15 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); in set_bit()
29 static inline void clear_bit(int nr, volatile unsigned long *addr) in clear_bit() argument
31 unsigned long mask = BIT_MASK(nr); in clear_bit()
32 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); in clear_bit()
46 static inline void change_bit(int nr, volatile unsigned long *addr) in change_bit() argument
48 unsigned long mask = BIT_MASK(nr); in change_bit()
49 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); in change_bit()
63 static inline int test_and_set_bit(int nr, volatile unsigned long *addr) in test_and_set_bit() argument
[all …]
/arch/powerpc/include/asm/
Dbitops.h87 static inline void arch_set_bit(int nr, volatile unsigned long *addr) in DEFINE_BITOP()
89 set_bits(BIT_MASK(nr), addr + BIT_WORD(nr)); in DEFINE_BITOP()
92 static inline void arch_clear_bit(int nr, volatile unsigned long *addr) in arch_clear_bit() argument
94 clear_bits(BIT_MASK(nr), addr + BIT_WORD(nr)); in arch_clear_bit()
97 static inline void arch_clear_bit_unlock(int nr, volatile unsigned long *addr) in arch_clear_bit_unlock() argument
99 clear_bits_unlock(BIT_MASK(nr), addr + BIT_WORD(nr)); in arch_clear_bit_unlock()
102 static inline void arch_change_bit(int nr, volatile unsigned long *addr) in arch_change_bit() argument
104 change_bits(BIT_MASK(nr), addr + BIT_WORD(nr)); in arch_change_bit()
138 static inline int arch_test_and_set_bit(unsigned long nr, in arch_test_and_set_bit() argument
141 return test_and_set_bits(BIT_MASK(nr), addr + BIT_WORD(nr)) != 0; in arch_test_and_set_bit()
[all …]
/arch/arm/tools/
Dgen-mach-types6 BEGIN { nr = 0 }
11 machine_is[nr] = "machine_is_"$1;
12 config[nr] = "CONFIG_"$2;
13 mach_type[nr] = "MACH_TYPE_"$3;
14 num[nr] = $4; nr++
18 machine_is[nr] = "machine_is_"$1;
19 config[nr] = "CONFIG_"$2;
20 mach_type[nr] = "MACH_TYPE_"$3;
21 num[nr] = ""; nr++
38 for (i = 0; i < nr; i++)
[all …]

12345678910>>...16