1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Performance event support for s390x - CPU-measurement Counter Facility
4 *
5 * Copyright IBM Corp. 2012, 2021
6 * Author(s): Hendrik Brueckner <brueckner@linux.ibm.com>
7 * Thomas Richter <tmricht@linux.ibm.com>
8 */
9 #define KMSG_COMPONENT "cpum_cf"
10 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11
12 #include <linux/kernel.h>
13 #include <linux/kernel_stat.h>
14 #include <linux/percpu.h>
15 #include <linux/notifier.h>
16 #include <linux/init.h>
17 #include <linux/export.h>
18 #include <linux/miscdevice.h>
19
20 #include <asm/cpu_mcf.h>
21 #include <asm/hwctrset.h>
22 #include <asm/debug.h>
23
24 static unsigned int cfdiag_cpu_speed; /* CPU speed for CF_DIAG trailer */
25 static debug_info_t *cf_dbg;
26
27 #define CF_DIAG_CTRSET_DEF 0xfeef /* Counter set header mark */
28 /* interval in seconds */
29
30 /* Counter sets are stored as data stream in a page sized memory buffer and
31 * exported to user space via raw data attached to the event sample data.
32 * Each counter set starts with an eight byte header consisting of:
33 * - a two byte eye catcher (0xfeef)
34 * - a one byte counter set number
35 * - a two byte counter set size (indicates the number of counters in this set)
36 * - a three byte reserved value (must be zero) to make the header the same
37 * size as a counter value.
38 * All counter values are eight byte in size.
39 *
40 * All counter sets are followed by a 64 byte trailer.
41 * The trailer consists of a:
42 * - flag field indicating valid fields when corresponding bit set
43 * - the counter facility first and second version number
44 * - the CPU speed if nonzero
45 * - the time stamp the counter sets have been collected
46 * - the time of day (TOD) base value
47 * - the machine type.
48 *
49 * The counter sets are saved when the process is prepared to be executed on a
50 * CPU and saved again when the process is going to be removed from a CPU.
51 * The difference of both counter sets are calculated and stored in the event
52 * sample data area.
53 */
54 struct cf_ctrset_entry { /* CPU-M CF counter set entry (8 byte) */
55 unsigned int def:16; /* 0-15 Data Entry Format */
56 unsigned int set:16; /* 16-31 Counter set identifier */
57 unsigned int ctr:16; /* 32-47 Number of stored counters */
58 unsigned int res1:16; /* 48-63 Reserved */
59 };
60
61 struct cf_trailer_entry { /* CPU-M CF_DIAG trailer (64 byte) */
62 /* 0 - 7 */
63 union {
64 struct {
65 unsigned int clock_base:1; /* TOD clock base set */
66 unsigned int speed:1; /* CPU speed set */
67 /* Measurement alerts */
68 unsigned int mtda:1; /* Loss of MT ctr. data alert */
69 unsigned int caca:1; /* Counter auth. change alert */
70 unsigned int lcda:1; /* Loss of counter data alert */
71 };
72 unsigned long flags; /* 0-63 All indicators */
73 };
74 /* 8 - 15 */
75 unsigned int cfvn:16; /* 64-79 Ctr First Version */
76 unsigned int csvn:16; /* 80-95 Ctr Second Version */
77 unsigned int cpu_speed:32; /* 96-127 CPU speed */
78 /* 16 - 23 */
79 unsigned long timestamp; /* 128-191 Timestamp (TOD) */
80 /* 24 - 55 */
81 union {
82 struct {
83 unsigned long progusage1;
84 unsigned long progusage2;
85 unsigned long progusage3;
86 unsigned long tod_base;
87 };
88 unsigned long progusage[4];
89 };
90 /* 56 - 63 */
91 unsigned int mach_type:16; /* Machine type */
92 unsigned int res1:16; /* Reserved */
93 unsigned int res2:32; /* Reserved */
94 };
95
96 /* Create the trailer data at the end of a page. */
cfdiag_trailer(struct cf_trailer_entry * te)97 static void cfdiag_trailer(struct cf_trailer_entry *te)
98 {
99 struct cpu_cf_events *cpuhw = this_cpu_ptr(&cpu_cf_events);
100 struct cpuid cpuid;
101
102 te->cfvn = cpuhw->info.cfvn; /* Counter version numbers */
103 te->csvn = cpuhw->info.csvn;
104
105 get_cpu_id(&cpuid); /* Machine type */
106 te->mach_type = cpuid.machine;
107 te->cpu_speed = cfdiag_cpu_speed;
108 if (te->cpu_speed)
109 te->speed = 1;
110 te->clock_base = 1; /* Save clock base */
111 te->tod_base = tod_clock_base.tod;
112 te->timestamp = get_tod_clock_fast();
113 }
114
115 /* Read a counter set. The counter set number determines the counter set and
116 * the CPUM-CF first and second version number determine the number of
117 * available counters in each counter set.
118 * Each counter set starts with header containing the counter set number and
119 * the number of eight byte counters.
120 *
121 * The functions returns the number of bytes occupied by this counter set
122 * including the header.
123 * If there is no counter in the counter set, this counter set is useless and
124 * zero is returned on this case.
125 *
126 * Note that the counter sets may not be enabled or active and the stcctm
127 * instruction might return error 3. Depending on error_ok value this is ok,
128 * for example when called from cpumf_pmu_start() call back function.
129 */
cfdiag_getctrset(struct cf_ctrset_entry * ctrdata,int ctrset,size_t room,bool error_ok)130 static size_t cfdiag_getctrset(struct cf_ctrset_entry *ctrdata, int ctrset,
131 size_t room, bool error_ok)
132 {
133 struct cpu_cf_events *cpuhw = this_cpu_ptr(&cpu_cf_events);
134 size_t ctrset_size, need = 0;
135 int rc = 3; /* Assume write failure */
136
137 ctrdata->def = CF_DIAG_CTRSET_DEF;
138 ctrdata->set = ctrset;
139 ctrdata->res1 = 0;
140 ctrset_size = cpum_cf_ctrset_size(ctrset, &cpuhw->info);
141
142 if (ctrset_size) { /* Save data */
143 need = ctrset_size * sizeof(u64) + sizeof(*ctrdata);
144 if (need <= room) {
145 rc = ctr_stcctm(ctrset, ctrset_size,
146 (u64 *)(ctrdata + 1));
147 }
148 if (rc != 3 || error_ok)
149 ctrdata->ctr = ctrset_size;
150 else
151 need = 0;
152 }
153
154 debug_sprintf_event(cf_dbg, 3,
155 "%s ctrset %d ctrset_size %zu cfvn %d csvn %d"
156 " need %zd rc %d\n", __func__, ctrset, ctrset_size,
157 cpuhw->info.cfvn, cpuhw->info.csvn, need, rc);
158 return need;
159 }
160
161 static const u64 cpumf_ctr_ctl[CPUMF_CTR_SET_MAX] = {
162 [CPUMF_CTR_SET_BASIC] = 0x02,
163 [CPUMF_CTR_SET_USER] = 0x04,
164 [CPUMF_CTR_SET_CRYPTO] = 0x08,
165 [CPUMF_CTR_SET_EXT] = 0x01,
166 [CPUMF_CTR_SET_MT_DIAG] = 0x20,
167 };
168
169 /* Read out all counter sets and save them in the provided data buffer.
170 * The last 64 byte host an artificial trailer entry.
171 */
cfdiag_getctr(void * data,size_t sz,unsigned long auth,bool error_ok)172 static size_t cfdiag_getctr(void *data, size_t sz, unsigned long auth,
173 bool error_ok)
174 {
175 struct cf_trailer_entry *trailer;
176 size_t offset = 0, done;
177 int i;
178
179 memset(data, 0, sz);
180 sz -= sizeof(*trailer); /* Always room for trailer */
181 for (i = CPUMF_CTR_SET_BASIC; i < CPUMF_CTR_SET_MAX; ++i) {
182 struct cf_ctrset_entry *ctrdata = data + offset;
183
184 if (!(auth & cpumf_ctr_ctl[i]))
185 continue; /* Counter set not authorized */
186
187 done = cfdiag_getctrset(ctrdata, i, sz - offset, error_ok);
188 offset += done;
189 }
190 trailer = data + offset;
191 cfdiag_trailer(trailer);
192 return offset + sizeof(*trailer);
193 }
194
195 /* Calculate the difference for each counter in a counter set. */
cfdiag_diffctrset(u64 * pstart,u64 * pstop,int counters)196 static void cfdiag_diffctrset(u64 *pstart, u64 *pstop, int counters)
197 {
198 for (; --counters >= 0; ++pstart, ++pstop)
199 if (*pstop >= *pstart)
200 *pstop -= *pstart;
201 else
202 *pstop = *pstart - *pstop + 1;
203 }
204
205 /* Scan the counter sets and calculate the difference of each counter
206 * in each set. The result is the increment of each counter during the
207 * period the counter set has been activated.
208 *
209 * Return true on success.
210 */
cfdiag_diffctr(struct cpu_cf_events * cpuhw,unsigned long auth)211 static int cfdiag_diffctr(struct cpu_cf_events *cpuhw, unsigned long auth)
212 {
213 struct cf_trailer_entry *trailer_start, *trailer_stop;
214 struct cf_ctrset_entry *ctrstart, *ctrstop;
215 size_t offset = 0;
216
217 auth &= (1 << CPUMF_LCCTL_ENABLE_SHIFT) - 1;
218 do {
219 ctrstart = (struct cf_ctrset_entry *)(cpuhw->start + offset);
220 ctrstop = (struct cf_ctrset_entry *)(cpuhw->stop + offset);
221
222 if (memcmp(ctrstop, ctrstart, sizeof(*ctrstop))) {
223 pr_err_once("cpum_cf_diag counter set compare error "
224 "in set %i\n", ctrstart->set);
225 return 0;
226 }
227 auth &= ~cpumf_ctr_ctl[ctrstart->set];
228 if (ctrstart->def == CF_DIAG_CTRSET_DEF) {
229 cfdiag_diffctrset((u64 *)(ctrstart + 1),
230 (u64 *)(ctrstop + 1), ctrstart->ctr);
231 offset += ctrstart->ctr * sizeof(u64) +
232 sizeof(*ctrstart);
233 }
234 } while (ctrstart->def && auth);
235
236 /* Save time_stamp from start of event in stop's trailer */
237 trailer_start = (struct cf_trailer_entry *)(cpuhw->start + offset);
238 trailer_stop = (struct cf_trailer_entry *)(cpuhw->stop + offset);
239 trailer_stop->progusage[0] = trailer_start->timestamp;
240
241 return 1;
242 }
243
get_counter_set(u64 event)244 static enum cpumf_ctr_set get_counter_set(u64 event)
245 {
246 int set = CPUMF_CTR_SET_MAX;
247
248 if (event < 32)
249 set = CPUMF_CTR_SET_BASIC;
250 else if (event < 64)
251 set = CPUMF_CTR_SET_USER;
252 else if (event < 128)
253 set = CPUMF_CTR_SET_CRYPTO;
254 else if (event < 288)
255 set = CPUMF_CTR_SET_EXT;
256 else if (event >= 448 && event < 496)
257 set = CPUMF_CTR_SET_MT_DIAG;
258
259 return set;
260 }
261
validate_ctr_version(const struct hw_perf_event * hwc,enum cpumf_ctr_set set)262 static int validate_ctr_version(const struct hw_perf_event *hwc,
263 enum cpumf_ctr_set set)
264 {
265 struct cpu_cf_events *cpuhw;
266 int err = 0;
267 u16 mtdiag_ctl;
268
269 cpuhw = &get_cpu_var(cpu_cf_events);
270
271 /* check required version for counter sets */
272 switch (set) {
273 case CPUMF_CTR_SET_BASIC:
274 case CPUMF_CTR_SET_USER:
275 if (cpuhw->info.cfvn < 1)
276 err = -EOPNOTSUPP;
277 break;
278 case CPUMF_CTR_SET_CRYPTO:
279 if ((cpuhw->info.csvn >= 1 && cpuhw->info.csvn <= 5 &&
280 hwc->config > 79) ||
281 (cpuhw->info.csvn >= 6 && hwc->config > 83))
282 err = -EOPNOTSUPP;
283 break;
284 case CPUMF_CTR_SET_EXT:
285 if (cpuhw->info.csvn < 1)
286 err = -EOPNOTSUPP;
287 if ((cpuhw->info.csvn == 1 && hwc->config > 159) ||
288 (cpuhw->info.csvn == 2 && hwc->config > 175) ||
289 (cpuhw->info.csvn >= 3 && cpuhw->info.csvn <= 5
290 && hwc->config > 255) ||
291 (cpuhw->info.csvn >= 6 && hwc->config > 287))
292 err = -EOPNOTSUPP;
293 break;
294 case CPUMF_CTR_SET_MT_DIAG:
295 if (cpuhw->info.csvn <= 3)
296 err = -EOPNOTSUPP;
297 /*
298 * MT-diagnostic counters are read-only. The counter set
299 * is automatically enabled and activated on all CPUs with
300 * multithreading (SMT). Deactivation of multithreading
301 * also disables the counter set. State changes are ignored
302 * by lcctl(). Because Linux controls SMT enablement through
303 * a kernel parameter only, the counter set is either disabled
304 * or enabled and active.
305 *
306 * Thus, the counters can only be used if SMT is on and the
307 * counter set is enabled and active.
308 */
309 mtdiag_ctl = cpumf_ctr_ctl[CPUMF_CTR_SET_MT_DIAG];
310 if (!((cpuhw->info.auth_ctl & mtdiag_ctl) &&
311 (cpuhw->info.enable_ctl & mtdiag_ctl) &&
312 (cpuhw->info.act_ctl & mtdiag_ctl)))
313 err = -EOPNOTSUPP;
314 break;
315 case CPUMF_CTR_SET_MAX:
316 err = -EOPNOTSUPP;
317 }
318
319 put_cpu_var(cpu_cf_events);
320 return err;
321 }
322
validate_ctr_auth(const struct hw_perf_event * hwc)323 static int validate_ctr_auth(const struct hw_perf_event *hwc)
324 {
325 struct cpu_cf_events *cpuhw;
326 int err = 0;
327
328 cpuhw = &get_cpu_var(cpu_cf_events);
329
330 /* Check authorization for cpu counter sets.
331 * If the particular CPU counter set is not authorized,
332 * return with -ENOENT in order to fall back to other
333 * PMUs that might suffice the event request.
334 */
335 if (!(hwc->config_base & cpuhw->info.auth_ctl))
336 err = -ENOENT;
337
338 put_cpu_var(cpu_cf_events);
339 return err;
340 }
341
342 /*
343 * Change the CPUMF state to active.
344 * Enable and activate the CPU-counter sets according
345 * to the per-cpu control state.
346 */
cpumf_pmu_enable(struct pmu * pmu)347 static void cpumf_pmu_enable(struct pmu *pmu)
348 {
349 struct cpu_cf_events *cpuhw = this_cpu_ptr(&cpu_cf_events);
350 int err;
351
352 if (cpuhw->flags & PMU_F_ENABLED)
353 return;
354
355 err = lcctl(cpuhw->state | cpuhw->dev_state);
356 if (err) {
357 pr_err("Enabling the performance measuring unit "
358 "failed with rc=%x\n", err);
359 return;
360 }
361
362 cpuhw->flags |= PMU_F_ENABLED;
363 }
364
365 /*
366 * Change the CPUMF state to inactive.
367 * Disable and enable (inactive) the CPU-counter sets according
368 * to the per-cpu control state.
369 */
cpumf_pmu_disable(struct pmu * pmu)370 static void cpumf_pmu_disable(struct pmu *pmu)
371 {
372 struct cpu_cf_events *cpuhw = this_cpu_ptr(&cpu_cf_events);
373 int err;
374 u64 inactive;
375
376 if (!(cpuhw->flags & PMU_F_ENABLED))
377 return;
378
379 inactive = cpuhw->state & ~((1 << CPUMF_LCCTL_ENABLE_SHIFT) - 1);
380 inactive |= cpuhw->dev_state;
381 err = lcctl(inactive);
382 if (err) {
383 pr_err("Disabling the performance measuring unit "
384 "failed with rc=%x\n", err);
385 return;
386 }
387
388 cpuhw->flags &= ~PMU_F_ENABLED;
389 }
390
391
392 /* Number of perf events counting hardware events */
393 static atomic_t num_events = ATOMIC_INIT(0);
394 /* Used to avoid races in calling reserve/release_cpumf_hardware */
395 static DEFINE_MUTEX(pmc_reserve_mutex);
396
397 /* Release the PMU if event is the last perf event */
hw_perf_event_destroy(struct perf_event * event)398 static void hw_perf_event_destroy(struct perf_event *event)
399 {
400 if (!atomic_add_unless(&num_events, -1, 1)) {
401 mutex_lock(&pmc_reserve_mutex);
402 if (atomic_dec_return(&num_events) == 0)
403 __kernel_cpumcf_end();
404 mutex_unlock(&pmc_reserve_mutex);
405 }
406 }
407
408 /* CPUMF <-> perf event mappings for kernel+userspace (basic set) */
409 static const int cpumf_generic_events_basic[] = {
410 [PERF_COUNT_HW_CPU_CYCLES] = 0,
411 [PERF_COUNT_HW_INSTRUCTIONS] = 1,
412 [PERF_COUNT_HW_CACHE_REFERENCES] = -1,
413 [PERF_COUNT_HW_CACHE_MISSES] = -1,
414 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = -1,
415 [PERF_COUNT_HW_BRANCH_MISSES] = -1,
416 [PERF_COUNT_HW_BUS_CYCLES] = -1,
417 };
418 /* CPUMF <-> perf event mappings for userspace (problem-state set) */
419 static const int cpumf_generic_events_user[] = {
420 [PERF_COUNT_HW_CPU_CYCLES] = 32,
421 [PERF_COUNT_HW_INSTRUCTIONS] = 33,
422 [PERF_COUNT_HW_CACHE_REFERENCES] = -1,
423 [PERF_COUNT_HW_CACHE_MISSES] = -1,
424 [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = -1,
425 [PERF_COUNT_HW_BRANCH_MISSES] = -1,
426 [PERF_COUNT_HW_BUS_CYCLES] = -1,
427 };
428
cpumf_hw_inuse(void)429 static void cpumf_hw_inuse(void)
430 {
431 mutex_lock(&pmc_reserve_mutex);
432 if (atomic_inc_return(&num_events) == 1)
433 __kernel_cpumcf_begin();
434 mutex_unlock(&pmc_reserve_mutex);
435 }
436
__hw_perf_event_init(struct perf_event * event,unsigned int type)437 static int __hw_perf_event_init(struct perf_event *event, unsigned int type)
438 {
439 struct perf_event_attr *attr = &event->attr;
440 struct hw_perf_event *hwc = &event->hw;
441 enum cpumf_ctr_set set;
442 int err = 0;
443 u64 ev;
444
445 switch (type) {
446 case PERF_TYPE_RAW:
447 /* Raw events are used to access counters directly,
448 * hence do not permit excludes */
449 if (attr->exclude_kernel || attr->exclude_user ||
450 attr->exclude_hv)
451 return -EOPNOTSUPP;
452 ev = attr->config;
453 break;
454
455 case PERF_TYPE_HARDWARE:
456 if (is_sampling_event(event)) /* No sampling support */
457 return -ENOENT;
458 ev = attr->config;
459 /* Count user space (problem-state) only */
460 if (!attr->exclude_user && attr->exclude_kernel) {
461 if (ev >= ARRAY_SIZE(cpumf_generic_events_user))
462 return -EOPNOTSUPP;
463 ev = cpumf_generic_events_user[ev];
464
465 /* No support for kernel space counters only */
466 } else if (!attr->exclude_kernel && attr->exclude_user) {
467 return -EOPNOTSUPP;
468 } else { /* Count user and kernel space */
469 if (ev >= ARRAY_SIZE(cpumf_generic_events_basic))
470 return -EOPNOTSUPP;
471 ev = cpumf_generic_events_basic[ev];
472 }
473 break;
474
475 default:
476 return -ENOENT;
477 }
478
479 if (ev == -1)
480 return -ENOENT;
481
482 if (ev > PERF_CPUM_CF_MAX_CTR)
483 return -ENOENT;
484
485 /* Obtain the counter set to which the specified counter belongs */
486 set = get_counter_set(ev);
487 switch (set) {
488 case CPUMF_CTR_SET_BASIC:
489 case CPUMF_CTR_SET_USER:
490 case CPUMF_CTR_SET_CRYPTO:
491 case CPUMF_CTR_SET_EXT:
492 case CPUMF_CTR_SET_MT_DIAG:
493 /*
494 * Use the hardware perf event structure to store the
495 * counter number in the 'config' member and the counter
496 * set number in the 'config_base' as bit mask.
497 * It is later used to enable/disable the counter(s).
498 */
499 hwc->config = ev;
500 hwc->config_base = cpumf_ctr_ctl[set];
501 break;
502 case CPUMF_CTR_SET_MAX:
503 /* The counter could not be associated to a counter set */
504 return -EINVAL;
505 }
506
507 /* Initialize for using the CPU-measurement counter facility */
508 cpumf_hw_inuse();
509 event->destroy = hw_perf_event_destroy;
510
511 /* Finally, validate version and authorization of the counter set */
512 err = validate_ctr_auth(hwc);
513 if (!err)
514 err = validate_ctr_version(hwc, set);
515
516 return err;
517 }
518
519 /* Events CPU_CYLCES and INSTRUCTIONS can be submitted with two different
520 * attribute::type values:
521 * - PERF_TYPE_HARDWARE:
522 * - pmu->type:
523 * Handle both type of invocations identical. They address the same hardware.
524 * The result is different when event modifiers exclude_kernel and/or
525 * exclude_user are also set.
526 */
cpumf_pmu_event_type(struct perf_event * event)527 static int cpumf_pmu_event_type(struct perf_event *event)
528 {
529 u64 ev = event->attr.config;
530
531 if (cpumf_generic_events_basic[PERF_COUNT_HW_CPU_CYCLES] == ev ||
532 cpumf_generic_events_basic[PERF_COUNT_HW_INSTRUCTIONS] == ev ||
533 cpumf_generic_events_user[PERF_COUNT_HW_CPU_CYCLES] == ev ||
534 cpumf_generic_events_user[PERF_COUNT_HW_INSTRUCTIONS] == ev)
535 return PERF_TYPE_HARDWARE;
536 return PERF_TYPE_RAW;
537 }
538
cpumf_pmu_event_init(struct perf_event * event)539 static int cpumf_pmu_event_init(struct perf_event *event)
540 {
541 unsigned int type = event->attr.type;
542 int err;
543
544 if (type == PERF_TYPE_HARDWARE || type == PERF_TYPE_RAW)
545 err = __hw_perf_event_init(event, type);
546 else if (event->pmu->type == type)
547 /* Registered as unknown PMU */
548 err = __hw_perf_event_init(event, cpumf_pmu_event_type(event));
549 else
550 return -ENOENT;
551
552 if (unlikely(err) && event->destroy)
553 event->destroy(event);
554
555 return err;
556 }
557
hw_perf_event_reset(struct perf_event * event)558 static int hw_perf_event_reset(struct perf_event *event)
559 {
560 u64 prev, new;
561 int err;
562
563 do {
564 prev = local64_read(&event->hw.prev_count);
565 err = ecctr(event->hw.config, &new);
566 if (err) {
567 if (err != 3)
568 break;
569 /* The counter is not (yet) available. This
570 * might happen if the counter set to which
571 * this counter belongs is in the disabled
572 * state.
573 */
574 new = 0;
575 }
576 } while (local64_cmpxchg(&event->hw.prev_count, prev, new) != prev);
577
578 return err;
579 }
580
hw_perf_event_update(struct perf_event * event)581 static void hw_perf_event_update(struct perf_event *event)
582 {
583 u64 prev, new, delta;
584 int err;
585
586 do {
587 prev = local64_read(&event->hw.prev_count);
588 err = ecctr(event->hw.config, &new);
589 if (err)
590 return;
591 } while (local64_cmpxchg(&event->hw.prev_count, prev, new) != prev);
592
593 delta = (prev <= new) ? new - prev
594 : (-1ULL - prev) + new + 1; /* overflow */
595 local64_add(delta, &event->count);
596 }
597
cpumf_pmu_read(struct perf_event * event)598 static void cpumf_pmu_read(struct perf_event *event)
599 {
600 if (event->hw.state & PERF_HES_STOPPED)
601 return;
602
603 hw_perf_event_update(event);
604 }
605
cpumf_pmu_start(struct perf_event * event,int flags)606 static void cpumf_pmu_start(struct perf_event *event, int flags)
607 {
608 struct cpu_cf_events *cpuhw = this_cpu_ptr(&cpu_cf_events);
609 struct hw_perf_event *hwc = &event->hw;
610 int i;
611
612 if (!(hwc->state & PERF_HES_STOPPED))
613 return;
614
615 hwc->state = 0;
616
617 /* (Re-)enable and activate the counter set */
618 ctr_set_enable(&cpuhw->state, hwc->config_base);
619 ctr_set_start(&cpuhw->state, hwc->config_base);
620
621 /* The counter set to which this counter belongs can be already active.
622 * Because all counters in a set are active, the event->hw.prev_count
623 * needs to be synchronized. At this point, the counter set can be in
624 * the inactive or disabled state.
625 */
626 if (hwc->config == PERF_EVENT_CPUM_CF_DIAG) {
627 cpuhw->usedss = cfdiag_getctr(cpuhw->start,
628 sizeof(cpuhw->start),
629 hwc->config_base, true);
630 } else {
631 hw_perf_event_reset(event);
632 }
633
634 /* Increment refcount for counter sets */
635 for (i = CPUMF_CTR_SET_BASIC; i < CPUMF_CTR_SET_MAX; ++i)
636 if ((hwc->config_base & cpumf_ctr_ctl[i]))
637 atomic_inc(&cpuhw->ctr_set[i]);
638 }
639
640 /* Create perf event sample with the counter sets as raw data. The sample
641 * is then pushed to the event subsystem and the function checks for
642 * possible event overflows. If an event overflow occurs, the PMU is
643 * stopped.
644 *
645 * Return non-zero if an event overflow occurred.
646 */
cfdiag_push_sample(struct perf_event * event,struct cpu_cf_events * cpuhw)647 static int cfdiag_push_sample(struct perf_event *event,
648 struct cpu_cf_events *cpuhw)
649 {
650 struct perf_sample_data data;
651 struct perf_raw_record raw;
652 struct pt_regs regs;
653 int overflow;
654
655 /* Setup perf sample */
656 perf_sample_data_init(&data, 0, event->hw.last_period);
657 memset(®s, 0, sizeof(regs));
658 memset(&raw, 0, sizeof(raw));
659
660 if (event->attr.sample_type & PERF_SAMPLE_CPU)
661 data.cpu_entry.cpu = event->cpu;
662 if (event->attr.sample_type & PERF_SAMPLE_RAW) {
663 raw.frag.size = cpuhw->usedss;
664 raw.frag.data = cpuhw->stop;
665 raw.size = raw.frag.size;
666 data.raw = &raw;
667 }
668
669 overflow = perf_event_overflow(event, &data, ®s);
670 debug_sprintf_event(cf_dbg, 3,
671 "%s event %#llx sample_type %#llx raw %d ov %d\n",
672 __func__, event->hw.config,
673 event->attr.sample_type, raw.size, overflow);
674 if (overflow)
675 event->pmu->stop(event, 0);
676
677 perf_event_update_userpage(event);
678 return overflow;
679 }
680
cpumf_pmu_stop(struct perf_event * event,int flags)681 static void cpumf_pmu_stop(struct perf_event *event, int flags)
682 {
683 struct cpu_cf_events *cpuhw = this_cpu_ptr(&cpu_cf_events);
684 struct hw_perf_event *hwc = &event->hw;
685 int i;
686
687 if (!(hwc->state & PERF_HES_STOPPED)) {
688 /* Decrement reference count for this counter set and if this
689 * is the last used counter in the set, clear activation
690 * control and set the counter set state to inactive.
691 */
692 for (i = CPUMF_CTR_SET_BASIC; i < CPUMF_CTR_SET_MAX; ++i) {
693 if (!(hwc->config_base & cpumf_ctr_ctl[i]))
694 continue;
695 if (!atomic_dec_return(&cpuhw->ctr_set[i]))
696 ctr_set_stop(&cpuhw->state, cpumf_ctr_ctl[i]);
697 }
698 hwc->state |= PERF_HES_STOPPED;
699 }
700
701 if ((flags & PERF_EF_UPDATE) && !(hwc->state & PERF_HES_UPTODATE)) {
702 if (hwc->config == PERF_EVENT_CPUM_CF_DIAG) {
703 local64_inc(&event->count);
704 cpuhw->usedss = cfdiag_getctr(cpuhw->stop,
705 sizeof(cpuhw->stop),
706 event->hw.config_base,
707 false);
708 if (cfdiag_diffctr(cpuhw, event->hw.config_base))
709 cfdiag_push_sample(event, cpuhw);
710 } else if (cpuhw->flags & PMU_F_RESERVED) {
711 /* Only update when PMU not hotplugged off */
712 hw_perf_event_update(event);
713 }
714 hwc->state |= PERF_HES_UPTODATE;
715 }
716 }
717
cpumf_pmu_add(struct perf_event * event,int flags)718 static int cpumf_pmu_add(struct perf_event *event, int flags)
719 {
720 struct cpu_cf_events *cpuhw = this_cpu_ptr(&cpu_cf_events);
721
722 ctr_set_enable(&cpuhw->state, event->hw.config_base);
723 event->hw.state = PERF_HES_UPTODATE | PERF_HES_STOPPED;
724
725 if (flags & PERF_EF_START)
726 cpumf_pmu_start(event, PERF_EF_RELOAD);
727
728 return 0;
729 }
730
cpumf_pmu_del(struct perf_event * event,int flags)731 static void cpumf_pmu_del(struct perf_event *event, int flags)
732 {
733 struct cpu_cf_events *cpuhw = this_cpu_ptr(&cpu_cf_events);
734 int i;
735
736 cpumf_pmu_stop(event, PERF_EF_UPDATE);
737
738 /* Check if any counter in the counter set is still used. If not used,
739 * change the counter set to the disabled state. This also clears the
740 * content of all counters in the set.
741 *
742 * When a new perf event has been added but not yet started, this can
743 * clear enable control and resets all counters in a set. Therefore,
744 * cpumf_pmu_start() always has to reenable a counter set.
745 */
746 for (i = CPUMF_CTR_SET_BASIC; i < CPUMF_CTR_SET_MAX; ++i)
747 if (!atomic_read(&cpuhw->ctr_set[i]))
748 ctr_set_disable(&cpuhw->state, cpumf_ctr_ctl[i]);
749 }
750
751 /* Performance monitoring unit for s390x */
752 static struct pmu cpumf_pmu = {
753 .task_ctx_nr = perf_sw_context,
754 .capabilities = PERF_PMU_CAP_NO_INTERRUPT,
755 .pmu_enable = cpumf_pmu_enable,
756 .pmu_disable = cpumf_pmu_disable,
757 .event_init = cpumf_pmu_event_init,
758 .add = cpumf_pmu_add,
759 .del = cpumf_pmu_del,
760 .start = cpumf_pmu_start,
761 .stop = cpumf_pmu_stop,
762 .read = cpumf_pmu_read,
763 };
764
765 static int cfset_init(void);
cpumf_pmu_init(void)766 static int __init cpumf_pmu_init(void)
767 {
768 int rc;
769
770 if (!kernel_cpumcf_avail())
771 return -ENODEV;
772
773 /* Setup s390dbf facility */
774 cf_dbg = debug_register(KMSG_COMPONENT, 2, 1, 128);
775 if (!cf_dbg) {
776 pr_err("Registration of s390dbf(cpum_cf) failed\n");
777 return -ENOMEM;
778 }
779 debug_register_view(cf_dbg, &debug_sprintf_view);
780
781 cpumf_pmu.attr_groups = cpumf_cf_event_group();
782 rc = perf_pmu_register(&cpumf_pmu, "cpum_cf", -1);
783 if (rc) {
784 debug_unregister_view(cf_dbg, &debug_sprintf_view);
785 debug_unregister(cf_dbg);
786 pr_err("Registering the cpum_cf PMU failed with rc=%i\n", rc);
787 } else if (stccm_avail()) { /* Setup counter set device */
788 cfset_init();
789 }
790 return rc;
791 }
792
793 /* Support for the CPU Measurement Facility counter set extraction using
794 * device /dev/hwctr. This allows user space programs to extract complete
795 * counter set via normal file operations.
796 */
797
798 static atomic_t cfset_opencnt = ATOMIC_INIT(0); /* Excl. access */
799 static DEFINE_MUTEX(cfset_ctrset_mutex);/* Synchronize access to hardware */
800 struct cfset_call_on_cpu_parm { /* Parm struct for smp_call_on_cpu */
801 unsigned int sets; /* Counter set bit mask */
802 atomic_t cpus_ack; /* # CPUs successfully executed func */
803 };
804
805 static struct cfset_request { /* CPUs and counter set bit mask */
806 unsigned long ctrset; /* Bit mask of counter set to read */
807 cpumask_t mask; /* CPU mask to read from */
808 } cfset_request;
809
cfset_ctrset_clear(void)810 static void cfset_ctrset_clear(void)
811 {
812 cpumask_clear(&cfset_request.mask);
813 cfset_request.ctrset = 0;
814 }
815
816 /* The /dev/hwctr device access uses PMU_F_IN_USE to mark the device access
817 * path is currently used.
818 * The cpu_cf_events::dev_state is used to denote counter sets in use by this
819 * interface. It is always or'ed in. If this interface is not active, its
820 * value is zero and no additional counter sets will be included.
821 *
822 * The cpu_cf_events::state is used by the perf_event_open SVC and remains
823 * unchanged.
824 *
825 * perf_pmu_enable() and perf_pmu_enable() and its call backs
826 * cpumf_pmu_enable() and cpumf_pmu_disable() are called by the
827 * performance measurement subsystem to enable per process
828 * CPU Measurement counter facility.
829 * The XXX_enable() and XXX_disable functions are used to turn off
830 * x86 performance monitoring interrupt (PMI) during scheduling.
831 * s390 uses these calls to temporarily stop and resume the active CPU
832 * counters sets during scheduling.
833 *
834 * We do allow concurrent access of perf_event_open() SVC and /dev/hwctr
835 * device access. The perf_event_open() SVC interface makes a lot of effort
836 * to only run the counters while the calling process is actively scheduled
837 * to run.
838 * When /dev/hwctr interface is also used at the same time, the counter sets
839 * will keep running, even when the process is scheduled off a CPU.
840 * However this is not a problem and does not lead to wrong counter values
841 * for the perf_event_open() SVC. The current counter value will be recorded
842 * during schedule-in. At schedule-out time the current counter value is
843 * extracted again and the delta is calculated and added to the event.
844 */
845 /* Stop all counter sets via ioctl interface */
cfset_ioctl_off(void * parm)846 static void cfset_ioctl_off(void *parm)
847 {
848 struct cpu_cf_events *cpuhw = this_cpu_ptr(&cpu_cf_events);
849 struct cfset_call_on_cpu_parm *p = parm;
850 int rc;
851
852 cpuhw->dev_state = 0;
853 for (rc = CPUMF_CTR_SET_BASIC; rc < CPUMF_CTR_SET_MAX; ++rc)
854 if ((p->sets & cpumf_ctr_ctl[rc]))
855 atomic_dec(&cpuhw->ctr_set[rc]);
856 rc = lcctl(cpuhw->state); /* Keep perf_event_open counter sets */
857 if (rc)
858 pr_err("Counter set stop %#llx of /dev/%s failed rc=%i\n",
859 cpuhw->state, S390_HWCTR_DEVICE, rc);
860 cpuhw->flags &= ~PMU_F_IN_USE;
861 debug_sprintf_event(cf_dbg, 4, "%s rc %d state %#llx dev_state %#llx\n",
862 __func__, rc, cpuhw->state, cpuhw->dev_state);
863 }
864
865 /* Start counter sets on particular CPU */
cfset_ioctl_on(void * parm)866 static void cfset_ioctl_on(void *parm)
867 {
868 struct cpu_cf_events *cpuhw = this_cpu_ptr(&cpu_cf_events);
869 struct cfset_call_on_cpu_parm *p = parm;
870 int rc;
871
872 cpuhw->flags |= PMU_F_IN_USE;
873 ctr_set_enable(&cpuhw->dev_state, p->sets);
874 ctr_set_start(&cpuhw->dev_state, p->sets);
875 for (rc = CPUMF_CTR_SET_BASIC; rc < CPUMF_CTR_SET_MAX; ++rc)
876 if ((p->sets & cpumf_ctr_ctl[rc]))
877 atomic_inc(&cpuhw->ctr_set[rc]);
878 rc = lcctl(cpuhw->dev_state | cpuhw->state); /* Start counter sets */
879 if (!rc)
880 atomic_inc(&p->cpus_ack);
881 else
882 pr_err("Counter set start %#llx of /dev/%s failed rc=%i\n",
883 cpuhw->dev_state | cpuhw->state, S390_HWCTR_DEVICE, rc);
884 debug_sprintf_event(cf_dbg, 4, "%s rc %d state %#llx dev_state %#llx\n",
885 __func__, rc, cpuhw->state, cpuhw->dev_state);
886 }
887
cfset_release_cpu(void * p)888 static void cfset_release_cpu(void *p)
889 {
890 struct cpu_cf_events *cpuhw = this_cpu_ptr(&cpu_cf_events);
891 int rc;
892
893 debug_sprintf_event(cf_dbg, 4, "%s state %#llx dev_state %#llx\n",
894 __func__, cpuhw->state, cpuhw->dev_state);
895 rc = lcctl(cpuhw->state); /* Keep perf_event_open counter sets */
896 if (rc)
897 pr_err("Counter set release %#llx of /dev/%s failed rc=%i\n",
898 cpuhw->state, S390_HWCTR_DEVICE, rc);
899 cpuhw->dev_state = 0;
900 }
901
902 /* Release function is also called when application gets terminated without
903 * doing a proper ioctl(..., S390_HWCTR_STOP, ...) command.
904 */
cfset_release(struct inode * inode,struct file * file)905 static int cfset_release(struct inode *inode, struct file *file)
906 {
907 on_each_cpu(cfset_release_cpu, NULL, 1);
908 hw_perf_event_destroy(NULL);
909 cfset_ctrset_clear();
910 atomic_set(&cfset_opencnt, 0);
911 return 0;
912 }
913
cfset_open(struct inode * inode,struct file * file)914 static int cfset_open(struct inode *inode, struct file *file)
915 {
916 if (!capable(CAP_SYS_ADMIN))
917 return -EPERM;
918 /* Only one user space program can open /dev/hwctr */
919 if (atomic_xchg(&cfset_opencnt, 1))
920 return -EBUSY;
921
922 cpumf_hw_inuse();
923 file->private_data = NULL;
924 /* nonseekable_open() never fails */
925 return nonseekable_open(inode, file);
926 }
927
cfset_all_stop(void)928 static int cfset_all_stop(void)
929 {
930 struct cfset_call_on_cpu_parm p = {
931 .sets = cfset_request.ctrset,
932 };
933 cpumask_var_t mask;
934
935 if (!alloc_cpumask_var(&mask, GFP_KERNEL))
936 return -ENOMEM;
937 cpumask_and(mask, &cfset_request.mask, cpu_online_mask);
938 on_each_cpu_mask(mask, cfset_ioctl_off, &p, 1);
939 free_cpumask_var(mask);
940 return 0;
941 }
942
cfset_all_start(void)943 static int cfset_all_start(void)
944 {
945 struct cfset_call_on_cpu_parm p = {
946 .sets = cfset_request.ctrset,
947 .cpus_ack = ATOMIC_INIT(0),
948 };
949 cpumask_var_t mask;
950 int rc = 0;
951
952 if (!alloc_cpumask_var(&mask, GFP_KERNEL))
953 return -ENOMEM;
954 cpumask_and(mask, &cfset_request.mask, cpu_online_mask);
955 on_each_cpu_mask(mask, cfset_ioctl_on, &p, 1);
956 if (atomic_read(&p.cpus_ack) != cpumask_weight(mask)) {
957 on_each_cpu_mask(mask, cfset_ioctl_off, &p, 1);
958 rc = -EIO;
959 debug_sprintf_event(cf_dbg, 4, "%s CPUs missing", __func__);
960 }
961 free_cpumask_var(mask);
962 return rc;
963 }
964
965
966 /* Return the maximum required space for all possible CPUs in case one
967 * CPU will be onlined during the START, READ, STOP cycles.
968 * To find out the size of the counter sets, any one CPU will do. They
969 * all have the same counter sets.
970 */
cfset_needspace(unsigned int sets)971 static size_t cfset_needspace(unsigned int sets)
972 {
973 struct cpu_cf_events *cpuhw = get_cpu_ptr(&cpu_cf_events);
974 size_t bytes = 0;
975 int i;
976
977 for (i = CPUMF_CTR_SET_BASIC; i < CPUMF_CTR_SET_MAX; ++i) {
978 if (!(sets & cpumf_ctr_ctl[i]))
979 continue;
980 bytes += cpum_cf_ctrset_size(i, &cpuhw->info) * sizeof(u64) +
981 sizeof(((struct s390_ctrset_setdata *)0)->set) +
982 sizeof(((struct s390_ctrset_setdata *)0)->no_cnts);
983 }
984 bytes = sizeof(((struct s390_ctrset_read *)0)->no_cpus) + nr_cpu_ids *
985 (bytes + sizeof(((struct s390_ctrset_cpudata *)0)->cpu_nr) +
986 sizeof(((struct s390_ctrset_cpudata *)0)->no_sets));
987 put_cpu_ptr(&cpu_cf_events);
988 return bytes;
989 }
990
cfset_all_copy(unsigned long arg,cpumask_t * mask)991 static int cfset_all_copy(unsigned long arg, cpumask_t *mask)
992 {
993 struct s390_ctrset_read __user *ctrset_read;
994 unsigned int cpu, cpus, rc;
995 void __user *uptr;
996
997 ctrset_read = (struct s390_ctrset_read __user *)arg;
998 uptr = ctrset_read->data;
999 for_each_cpu(cpu, mask) {
1000 struct cpu_cf_events *cpuhw = per_cpu_ptr(&cpu_cf_events, cpu);
1001 struct s390_ctrset_cpudata __user *ctrset_cpudata;
1002
1003 ctrset_cpudata = uptr;
1004 rc = put_user(cpu, &ctrset_cpudata->cpu_nr);
1005 rc |= put_user(cpuhw->sets, &ctrset_cpudata->no_sets);
1006 rc |= copy_to_user(ctrset_cpudata->data, cpuhw->data,
1007 cpuhw->used);
1008 if (rc)
1009 return -EFAULT;
1010 uptr += sizeof(struct s390_ctrset_cpudata) + cpuhw->used;
1011 cond_resched();
1012 }
1013 cpus = cpumask_weight(mask);
1014 if (put_user(cpus, &ctrset_read->no_cpus))
1015 return -EFAULT;
1016 debug_sprintf_event(cf_dbg, 4, "%s copied %ld\n", __func__,
1017 uptr - (void __user *)ctrset_read->data);
1018 return 0;
1019 }
1020
cfset_cpuset_read(struct s390_ctrset_setdata * p,int ctrset,int ctrset_size,size_t room)1021 static size_t cfset_cpuset_read(struct s390_ctrset_setdata *p, int ctrset,
1022 int ctrset_size, size_t room)
1023 {
1024 size_t need = 0;
1025 int rc = -1;
1026
1027 need = sizeof(*p) + sizeof(u64) * ctrset_size;
1028 if (need <= room) {
1029 p->set = cpumf_ctr_ctl[ctrset];
1030 p->no_cnts = ctrset_size;
1031 rc = ctr_stcctm(ctrset, ctrset_size, (u64 *)p->cv);
1032 if (rc == 3) /* Nothing stored */
1033 need = 0;
1034 }
1035 return need;
1036 }
1037
1038 /* Read all counter sets. */
cfset_cpu_read(void * parm)1039 static void cfset_cpu_read(void *parm)
1040 {
1041 struct cpu_cf_events *cpuhw = this_cpu_ptr(&cpu_cf_events);
1042 struct cfset_call_on_cpu_parm *p = parm;
1043 int set, set_size;
1044 size_t space;
1045
1046 /* No data saved yet */
1047 cpuhw->used = 0;
1048 cpuhw->sets = 0;
1049 memset(cpuhw->data, 0, sizeof(cpuhw->data));
1050
1051 /* Scan the counter sets */
1052 for (set = CPUMF_CTR_SET_BASIC; set < CPUMF_CTR_SET_MAX; ++set) {
1053 struct s390_ctrset_setdata *sp = (void *)cpuhw->data +
1054 cpuhw->used;
1055
1056 if (!(p->sets & cpumf_ctr_ctl[set]))
1057 continue; /* Counter set not in list */
1058 set_size = cpum_cf_ctrset_size(set, &cpuhw->info);
1059 space = sizeof(cpuhw->data) - cpuhw->used;
1060 space = cfset_cpuset_read(sp, set, set_size, space);
1061 if (space) {
1062 cpuhw->used += space;
1063 cpuhw->sets += 1;
1064 }
1065 }
1066 debug_sprintf_event(cf_dbg, 4, "%s sets %d used %zd\n", __func__,
1067 cpuhw->sets, cpuhw->used);
1068 }
1069
cfset_all_read(unsigned long arg)1070 static int cfset_all_read(unsigned long arg)
1071 {
1072 struct cfset_call_on_cpu_parm p;
1073 cpumask_var_t mask;
1074 int rc;
1075
1076 if (!alloc_cpumask_var(&mask, GFP_KERNEL))
1077 return -ENOMEM;
1078
1079 p.sets = cfset_request.ctrset;
1080 cpumask_and(mask, &cfset_request.mask, cpu_online_mask);
1081 on_each_cpu_mask(mask, cfset_cpu_read, &p, 1);
1082 rc = cfset_all_copy(arg, mask);
1083 free_cpumask_var(mask);
1084 return rc;
1085 }
1086
cfset_ioctl_read(unsigned long arg)1087 static long cfset_ioctl_read(unsigned long arg)
1088 {
1089 struct s390_ctrset_read read;
1090 int ret = 0;
1091
1092 if (copy_from_user(&read, (char __user *)arg, sizeof(read)))
1093 return -EFAULT;
1094 ret = cfset_all_read(arg);
1095 return ret;
1096 }
1097
cfset_ioctl_stop(void)1098 static long cfset_ioctl_stop(void)
1099 {
1100 int ret = ENXIO;
1101
1102 if (cfset_request.ctrset) {
1103 ret = cfset_all_stop();
1104 cfset_ctrset_clear();
1105 }
1106 return ret;
1107 }
1108
cfset_ioctl_start(unsigned long arg)1109 static long cfset_ioctl_start(unsigned long arg)
1110 {
1111 struct s390_ctrset_start __user *ustart;
1112 struct s390_ctrset_start start;
1113 void __user *umask;
1114 unsigned int len;
1115 int ret = 0;
1116 size_t need;
1117
1118 if (cfset_request.ctrset)
1119 return -EBUSY;
1120 ustart = (struct s390_ctrset_start __user *)arg;
1121 if (copy_from_user(&start, ustart, sizeof(start)))
1122 return -EFAULT;
1123 if (start.version != S390_HWCTR_START_VERSION)
1124 return -EINVAL;
1125 if (start.counter_sets & ~(cpumf_ctr_ctl[CPUMF_CTR_SET_BASIC] |
1126 cpumf_ctr_ctl[CPUMF_CTR_SET_USER] |
1127 cpumf_ctr_ctl[CPUMF_CTR_SET_CRYPTO] |
1128 cpumf_ctr_ctl[CPUMF_CTR_SET_EXT] |
1129 cpumf_ctr_ctl[CPUMF_CTR_SET_MT_DIAG]))
1130 return -EINVAL; /* Invalid counter set */
1131 if (!start.counter_sets)
1132 return -EINVAL; /* No counter set at all? */
1133 cpumask_clear(&cfset_request.mask);
1134 len = min_t(u64, start.cpumask_len, cpumask_size());
1135 umask = (void __user *)start.cpumask;
1136 if (copy_from_user(&cfset_request.mask, umask, len))
1137 return -EFAULT;
1138 if (cpumask_empty(&cfset_request.mask))
1139 return -EINVAL;
1140 need = cfset_needspace(start.counter_sets);
1141 if (put_user(need, &ustart->data_bytes))
1142 ret = -EFAULT;
1143 if (ret)
1144 goto out;
1145 cfset_request.ctrset = start.counter_sets;
1146 ret = cfset_all_start();
1147 out:
1148 if (ret)
1149 cfset_ctrset_clear();
1150 debug_sprintf_event(cf_dbg, 4, "%s sets %#lx need %ld ret %d\n",
1151 __func__, cfset_request.ctrset, need, ret);
1152 return ret;
1153 }
1154
1155 /* Entry point to the /dev/hwctr device interface.
1156 * The ioctl system call supports three subcommands:
1157 * S390_HWCTR_START: Start the specified counter sets on a CPU list. The
1158 * counter set keeps running until explicitly stopped. Returns the number
1159 * of bytes needed to store the counter values. If another S390_HWCTR_START
1160 * ioctl subcommand is called without a previous S390_HWCTR_STOP stop
1161 * command, -EBUSY is returned.
1162 * S390_HWCTR_READ: Read the counter set values from specified CPU list given
1163 * with the S390_HWCTR_START command.
1164 * S390_HWCTR_STOP: Stops the counter sets on the CPU list given with the
1165 * previous S390_HWCTR_START subcommand.
1166 */
cfset_ioctl(struct file * file,unsigned int cmd,unsigned long arg)1167 static long cfset_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1168 {
1169 int ret;
1170
1171 cpus_read_lock();
1172 mutex_lock(&cfset_ctrset_mutex);
1173 switch (cmd) {
1174 case S390_HWCTR_START:
1175 ret = cfset_ioctl_start(arg);
1176 break;
1177 case S390_HWCTR_STOP:
1178 ret = cfset_ioctl_stop();
1179 break;
1180 case S390_HWCTR_READ:
1181 ret = cfset_ioctl_read(arg);
1182 break;
1183 default:
1184 ret = -ENOTTY;
1185 break;
1186 }
1187 mutex_unlock(&cfset_ctrset_mutex);
1188 cpus_read_unlock();
1189 return ret;
1190 }
1191
1192 static const struct file_operations cfset_fops = {
1193 .owner = THIS_MODULE,
1194 .open = cfset_open,
1195 .release = cfset_release,
1196 .unlocked_ioctl = cfset_ioctl,
1197 .compat_ioctl = cfset_ioctl,
1198 .llseek = no_llseek
1199 };
1200
1201 static struct miscdevice cfset_dev = {
1202 .name = S390_HWCTR_DEVICE,
1203 .minor = MISC_DYNAMIC_MINOR,
1204 .fops = &cfset_fops,
1205 };
1206
cfset_online_cpu(unsigned int cpu)1207 int cfset_online_cpu(unsigned int cpu)
1208 {
1209 struct cfset_call_on_cpu_parm p;
1210
1211 mutex_lock(&cfset_ctrset_mutex);
1212 if (cfset_request.ctrset) {
1213 p.sets = cfset_request.ctrset;
1214 cfset_ioctl_on(&p);
1215 cpumask_set_cpu(cpu, &cfset_request.mask);
1216 }
1217 mutex_unlock(&cfset_ctrset_mutex);
1218 return 0;
1219 }
1220
cfset_offline_cpu(unsigned int cpu)1221 int cfset_offline_cpu(unsigned int cpu)
1222 {
1223 struct cfset_call_on_cpu_parm p;
1224
1225 mutex_lock(&cfset_ctrset_mutex);
1226 if (cfset_request.ctrset) {
1227 p.sets = cfset_request.ctrset;
1228 cfset_ioctl_off(&p);
1229 cpumask_clear_cpu(cpu, &cfset_request.mask);
1230 }
1231 mutex_unlock(&cfset_ctrset_mutex);
1232 return 0;
1233 }
1234
cfdiag_read(struct perf_event * event)1235 static void cfdiag_read(struct perf_event *event)
1236 {
1237 debug_sprintf_event(cf_dbg, 3, "%s event %#llx count %ld\n", __func__,
1238 event->attr.config, local64_read(&event->count));
1239 }
1240
get_authctrsets(void)1241 static int get_authctrsets(void)
1242 {
1243 struct cpu_cf_events *cpuhw;
1244 unsigned long auth = 0;
1245 enum cpumf_ctr_set i;
1246
1247 cpuhw = &get_cpu_var(cpu_cf_events);
1248 for (i = CPUMF_CTR_SET_BASIC; i < CPUMF_CTR_SET_MAX; ++i) {
1249 if (cpuhw->info.auth_ctl & cpumf_ctr_ctl[i])
1250 auth |= cpumf_ctr_ctl[i];
1251 }
1252 put_cpu_var(cpu_cf_events);
1253 return auth;
1254 }
1255
1256 /* Setup the event. Test for authorized counter sets and only include counter
1257 * sets which are authorized at the time of the setup. Including unauthorized
1258 * counter sets result in specification exception (and panic).
1259 */
cfdiag_event_init2(struct perf_event * event)1260 static int cfdiag_event_init2(struct perf_event *event)
1261 {
1262 struct perf_event_attr *attr = &event->attr;
1263 int err = 0;
1264
1265 /* Set sample_period to indicate sampling */
1266 event->hw.config = attr->config;
1267 event->hw.sample_period = attr->sample_period;
1268 local64_set(&event->hw.period_left, event->hw.sample_period);
1269 local64_set(&event->count, 0);
1270 event->hw.last_period = event->hw.sample_period;
1271
1272 /* Add all authorized counter sets to config_base. The
1273 * the hardware init function is either called per-cpu or just once
1274 * for all CPUS (event->cpu == -1). This depends on the whether
1275 * counting is started for all CPUs or on a per workload base where
1276 * the perf event moves from one CPU to another CPU.
1277 * Checking the authorization on any CPU is fine as the hardware
1278 * applies the same authorization settings to all CPUs.
1279 */
1280 event->hw.config_base = get_authctrsets();
1281
1282 /* No authorized counter sets, nothing to count/sample */
1283 if (!event->hw.config_base)
1284 err = -EINVAL;
1285
1286 debug_sprintf_event(cf_dbg, 5, "%s err %d config_base %#lx\n",
1287 __func__, err, event->hw.config_base);
1288 return err;
1289 }
1290
cfdiag_event_init(struct perf_event * event)1291 static int cfdiag_event_init(struct perf_event *event)
1292 {
1293 struct perf_event_attr *attr = &event->attr;
1294 int err = -ENOENT;
1295
1296 if (event->attr.config != PERF_EVENT_CPUM_CF_DIAG ||
1297 event->attr.type != event->pmu->type)
1298 goto out;
1299
1300 /* Raw events are used to access counters directly,
1301 * hence do not permit excludes.
1302 * This event is useless without PERF_SAMPLE_RAW to return counter set
1303 * values as raw data.
1304 */
1305 if (attr->exclude_kernel || attr->exclude_user || attr->exclude_hv ||
1306 !(attr->sample_type & (PERF_SAMPLE_CPU | PERF_SAMPLE_RAW))) {
1307 err = -EOPNOTSUPP;
1308 goto out;
1309 }
1310
1311 /* Initialize for using the CPU-measurement counter facility */
1312 cpumf_hw_inuse();
1313 event->destroy = hw_perf_event_destroy;
1314
1315 err = cfdiag_event_init2(event);
1316 if (unlikely(err))
1317 event->destroy(event);
1318 out:
1319 return err;
1320 }
1321
1322 /* Create cf_diag/events/CF_DIAG event sysfs file. This counter is used
1323 * to collect the complete counter sets for a scheduled process. Target
1324 * are complete counter sets attached as raw data to the artificial event.
1325 * This results in complete counter sets available when a process is
1326 * scheduled. Contains the delta of every counter while the process was
1327 * running.
1328 */
1329 CPUMF_EVENT_ATTR(CF_DIAG, CF_DIAG, PERF_EVENT_CPUM_CF_DIAG);
1330
1331 static struct attribute *cfdiag_events_attr[] = {
1332 CPUMF_EVENT_PTR(CF_DIAG, CF_DIAG),
1333 NULL,
1334 };
1335
1336 PMU_FORMAT_ATTR(event, "config:0-63");
1337
1338 static struct attribute *cfdiag_format_attr[] = {
1339 &format_attr_event.attr,
1340 NULL,
1341 };
1342
1343 static struct attribute_group cfdiag_events_group = {
1344 .name = "events",
1345 .attrs = cfdiag_events_attr,
1346 };
1347 static struct attribute_group cfdiag_format_group = {
1348 .name = "format",
1349 .attrs = cfdiag_format_attr,
1350 };
1351 static const struct attribute_group *cfdiag_attr_groups[] = {
1352 &cfdiag_events_group,
1353 &cfdiag_format_group,
1354 NULL,
1355 };
1356
1357 /* Performance monitoring unit for event CF_DIAG. Since this event
1358 * is also started and stopped via the perf_event_open() system call, use
1359 * the same event enable/disable call back functions. They do not
1360 * have a pointer to the perf_event strcture as first parameter.
1361 *
1362 * The functions XXX_add, XXX_del, XXX_start and XXX_stop are also common.
1363 * Reuse them and distinguish the event (always first parameter) via
1364 * 'config' member.
1365 */
1366 static struct pmu cf_diag = {
1367 .task_ctx_nr = perf_sw_context,
1368 .event_init = cfdiag_event_init,
1369 .pmu_enable = cpumf_pmu_enable,
1370 .pmu_disable = cpumf_pmu_disable,
1371 .add = cpumf_pmu_add,
1372 .del = cpumf_pmu_del,
1373 .start = cpumf_pmu_start,
1374 .stop = cpumf_pmu_stop,
1375 .read = cfdiag_read,
1376
1377 .attr_groups = cfdiag_attr_groups
1378 };
1379
1380 /* Calculate memory needed to store all counter sets together with header and
1381 * trailer data. This is independent of the counter set authorization which
1382 * can vary depending on the configuration.
1383 */
cfdiag_maxsize(struct cpumf_ctr_info * info)1384 static size_t cfdiag_maxsize(struct cpumf_ctr_info *info)
1385 {
1386 size_t max_size = sizeof(struct cf_trailer_entry);
1387 enum cpumf_ctr_set i;
1388
1389 for (i = CPUMF_CTR_SET_BASIC; i < CPUMF_CTR_SET_MAX; ++i) {
1390 size_t size = cpum_cf_ctrset_size(i, info);
1391
1392 if (size)
1393 max_size += size * sizeof(u64) +
1394 sizeof(struct cf_ctrset_entry);
1395 }
1396 return max_size;
1397 }
1398
1399 /* Get the CPU speed, try sampling facility first and CPU attributes second. */
cfdiag_get_cpu_speed(void)1400 static void cfdiag_get_cpu_speed(void)
1401 {
1402 if (cpum_sf_avail()) { /* Sampling facility first */
1403 struct hws_qsi_info_block si;
1404
1405 memset(&si, 0, sizeof(si));
1406 if (!qsi(&si)) {
1407 cfdiag_cpu_speed = si.cpu_speed;
1408 return;
1409 }
1410 }
1411
1412 /* Fallback: CPU speed extract static part. Used in case
1413 * CPU Measurement Sampling Facility is turned off.
1414 */
1415 if (test_facility(34)) {
1416 unsigned long mhz = __ecag(ECAG_CPU_ATTRIBUTE, 0);
1417
1418 if (mhz != -1UL)
1419 cfdiag_cpu_speed = mhz & 0xffffffff;
1420 }
1421 }
1422
cfset_init(void)1423 static int cfset_init(void)
1424 {
1425 struct cpumf_ctr_info info;
1426 size_t need;
1427 int rc;
1428
1429 if (qctri(&info))
1430 return -ENODEV;
1431
1432 cfdiag_get_cpu_speed();
1433 /* Make sure the counter set data fits into predefined buffer. */
1434 need = cfdiag_maxsize(&info);
1435 if (need > sizeof(((struct cpu_cf_events *)0)->start)) {
1436 pr_err("Insufficient memory for PMU(cpum_cf_diag) need=%zu\n",
1437 need);
1438 return -ENOMEM;
1439 }
1440
1441 rc = misc_register(&cfset_dev);
1442 if (rc) {
1443 pr_err("Registration of /dev/%s failed rc=%i\n",
1444 cfset_dev.name, rc);
1445 goto out;
1446 }
1447
1448 rc = perf_pmu_register(&cf_diag, "cpum_cf_diag", -1);
1449 if (rc) {
1450 misc_deregister(&cfset_dev);
1451 pr_err("Registration of PMU(cpum_cf_diag) failed with rc=%i\n",
1452 rc);
1453 }
1454 out:
1455 return rc;
1456 }
1457
1458 device_initcall(cpumf_pmu_init);
1459