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/arch/mips/cavium-octeon/executive/
Dcvmx-pko.c70 int queue; in __cvmx_pko_iport_config() local
76 for (queue = 0; queue < num_queues; queue++) { in __cvmx_pko_iport_config()
82 config.s.index = queue; in __cvmx_pko_iport_config()
83 config.s.qid = base_queue + queue; in __cvmx_pko_iport_config()
85 config.s.tail = (queue == (num_queues - 1)); in __cvmx_pko_iport_config()
86 config.s.s_tail = (queue == static_priority_end); in __cvmx_pko_iport_config()
88 config.s.static_q = (queue <= static_priority_end); in __cvmx_pko_iport_config()
92 CVMX_CMD_QUEUE_PKO(base_queue + queue), in __cvmx_pko_iport_config()
101 num_queues, queue); in __cvmx_pko_iport_config()
104 CVMX_CMD_QUEUE_PKO(base_queue + queue)); in __cvmx_pko_iport_config()
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Dcvmx-helper-util.c95 static int cvmx_helper_setup_red_queue(int queue, int pass_thresh, in cvmx_helper_setup_red_queue() argument
107 cvmx_write_csr(CVMX_IPD_QOSX_RED_MARKS(queue), red_marks.u64); in cvmx_helper_setup_red_queue()
116 cvmx_write_csr(CVMX_IPD_RED_QUEX_PARAM(queue), red_param.u64); in cvmx_helper_setup_red_queue()
136 int queue; in cvmx_helper_setup_red() local
151 for (queue = 0; queue < 8; queue++) in cvmx_helper_setup_red()
152 cvmx_helper_setup_red_queue(queue, pass_thresh, drop_thresh); in cvmx_helper_setup_red()
Dcvmx-helper-rgmii.c325 int queue = cvmx_pko_get_base_queue(ipd_port) + i; in __cvmx_helper_rgmii_link_set() local
326 cvmx_write_csr(CVMX_PKO_REG_READ_IDX, queue); in __cvmx_helper_rgmii_link_set()
329 pko_mem_queue_qos.s.qid = queue; in __cvmx_helper_rgmii_link_set()
437 int queue = cvmx_pko_get_base_queue(ipd_port) + i; in __cvmx_helper_rgmii_link_set() local
438 cvmx_write_csr(CVMX_PKO_REG_READ_IDX, queue); in __cvmx_helper_rgmii_link_set()
DMakefile13 obj-y += cvmx-pko.o cvmx-spi.o cvmx-cmd-queue.o \
/arch/mips/include/asm/octeon/
Dcvmx-pko.h151 uint64_t queue:9; member
156 uint64_t queue:9;
325 static inline void cvmx_pko_doorbell(uint64_t port, uint64_t queue, in cvmx_pko_doorbell() argument
335 ptr.s.queue = queue; in cvmx_pko_doorbell()
377 static inline void cvmx_pko_send_packet_prepare(uint64_t port, uint64_t queue, in cvmx_pko_send_packet_prepare() argument
395 (CVMX_TAG_SUBGROUP_MASK & queue); in cvmx_pko_send_packet_prepare()
420 uint64_t queue, in cvmx_pko_send_packet_finish() argument
428 result = cvmx_cmd_queue_write2(CVMX_CMD_QUEUE_PKO(queue), in cvmx_pko_send_packet_finish()
432 cvmx_pko_doorbell(port, queue, 2); in cvmx_pko_send_packet_finish()
463 uint64_t queue, in cvmx_pko_send_packet_finish3() argument
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Dcvmx-cmd-queue.h100 #define CVMX_CMD_QUEUE_PKO(queue) \ argument
101 ((cvmx_cmd_queue_id_t)(CVMX_CMD_QUEUE_PKO_BASE + (0xffff&(queue))))
108 #define CVMX_CMD_QUEUE_DMA(queue) \ argument
109 ((cvmx_cmd_queue_id_t)(CVMX_CMD_QUEUE_DMA_BASE + (0xffff&(queue))))
/arch/arm/boot/dts/
Dkeystone-k2l-netcp.dtsi15 queue-range = <0 0x2000>;
35 queue-pools {
77 multi-queue;
155 tx-queue = <896>;
205 rx-queue-depth = <128 128 0 0>;
207 rx-queue = <528>;
208 tx-completion-queue = <530>;
217 rx-queue-depth = <128 128 0 0>;
219 rx-queue = <529>;
220 tx-completion-queue = <531>;
Dintel-ixp45x-ixp46x.dtsi52 queue-rx = <&qmgr 0>;
53 queue-txready = <&qmgr 0>;
63 queue-rx = <&qmgr 0>;
64 queue-txready = <&qmgr 0>;
74 queue-rx = <&qmgr 0>;
75 queue-txready = <&qmgr 0>;
Dkeystone-k2e-netcp.dtsi15 queue-range = <0 0x2000>;
35 queue-pools {
77 multi-queue;
156 tx-queue = <896>;
223 rx-queue-depth = <128 128 0 0>;
225 rx-queue = <528>;
226 tx-completion-queue = <530>;
235 rx-queue-depth = <128 128 0 0>;
237 rx-queue = <529>;
238 tx-completion-queue = <531>;
Dkeystone-k2hk-netcp.dtsi15 queue-range = <0 0x4000>;
48 queue-pools {
94 multi-queue;
175 tx-queue = <648>;
225 rx-queue-depth = <128 128 0 0>;
227 rx-queue = <8704>;
228 tx-completion-queue = <8706>;
237 rx-queue-depth = <128 128 0 0>;
239 rx-queue = <8705>;
240 tx-completion-queue = <8707>;
Dintel-ixp4xx.dtsi44 qmgr: queue-manager@60000000 {
45 compatible = "intel,ixp4xx-ahb-queue-manager";
149 queue-rx = <&qmgr 30>;
150 queue-txready = <&qmgr 29>;
160 queue-rx = <&qmgr 3>;
161 queue-txready = <&qmgr 20>;
171 queue-rx = <&qmgr 0>;
172 queue-txready = <&qmgr 0>;
183 queue-rx = <&qmgr 0>;
184 queue-txready = <&qmgr 0>;
Dintel-ixp43x-kixrp435.dts40 queue-rx = <&qmgr 4>;
41 queue-txready = <&qmgr 21>;
61 queue-rx = <&qmgr 2>;
62 queue-txready = <&qmgr 19>;
Dkeystone-k2g-netcp.dtsi17 queue-range = <0 0x80>;
36 queue-pools {
120 tx-queue = <5>;
139 rx-queue-depth = <128 128 0 0>;
141 rx-queue = <77>;
142 tx-completion-queue = <78>;
Dintel-ixp42x-ixdp425.dts44 queue-rx = <&qmgr 3>;
45 queue-txready = <&qmgr 20>;
66 queue-rx = <&qmgr 4>;
67 queue-txready = <&qmgr 21>;
Dintel-ixp42x-adi-coyote.dts82 queue-rx = <&qmgr 3>;
83 queue-txready = <&qmgr 20>;
104 queue-rx = <&qmgr 4>;
105 queue-txready = <&qmgr 21>;
Dintel-ixp42x-ixdpg425.dts97 queue-rx = <&qmgr 3>;
98 queue-txready = <&qmgr 20>;
119 queue-rx = <&qmgr 4>;
120 queue-txready = <&qmgr 21>;
Dintel-ixp42x-freecom-fsg-3.dts130 queue-rx = <&qmgr 3>;
131 queue-txready = <&qmgr 20>;
152 queue-rx = <&qmgr 4>;
153 queue-txready = <&qmgr 21>;
Dintel-ixp42x-linksys-wrv54g.dts143 queue-rx = <&qmgr 3>;
144 queue-txready = <&qmgr 20>;
167 queue-rx = <&qmgr 4>;
168 queue-txready = <&qmgr 21>;
Dintel-ixp42x-arcom-vulcan.dts139 queue-rx = <&qmgr 3>;
140 queue-txready = <&qmgr 20>;
161 queue-rx = <&qmgr 4>;
162 queue-txready = <&qmgr 21>;
Dintel-ixp42x-gateworks-gw2348.dts144 queue-rx = <&qmgr 3>;
145 queue-txready = <&qmgr 20>;
166 queue-rx = <&qmgr 4>;
167 queue-txready = <&qmgr 21>;
Dintel-ixp43x-gateworks-gw2358.dts169 queue-rx = <&qmgr 4>;
170 queue-txready = <&qmgr 21>;
190 queue-rx = <&qmgr 2>;
191 queue-txready = <&qmgr 19>;
Dintel-ixp42x-netgear-wg302v2.dts80 queue-rx = <&qmgr 3>;
81 queue-txready = <&qmgr 20>;
/arch/powerpc/boot/dts/fsl/
Dp1020rdb-pc_camp_core1.dts107 35 36 40 /* enet1-queue-group0 */
108 51 52 67 /* enet1-queue-group1 */
109 31 32 33 /* enet2-queue-group0 */
110 25 26 27 /* enet2-queue-group1 */
Dp1020rdb-pc_camp_core0.dts54 42 29 30 34 /* serial1, enet0-queue-group0 */
55 17 18 24 45 /* enet0-queue-group1, crypto */
/arch/um/drivers/
Dubd_kern.c168 struct request_queue *queue; member
778 blk_queue_max_hw_sectors(ubd_dev->queue, 8 * sizeof(long)); in ubd_open_dev()
802 ubd_dev->queue->limits.discard_granularity = SECTOR_SIZE; in ubd_open_dev()
803 ubd_dev->queue->limits.discard_alignment = SECTOR_SIZE; in ubd_open_dev()
804 blk_queue_max_discard_sectors(ubd_dev->queue, UBD_MAX_REQUEST); in ubd_open_dev()
805 blk_queue_max_write_zeroes_sectors(ubd_dev->queue, UBD_MAX_REQUEST); in ubd_open_dev()
806 blk_queue_flag_set(QUEUE_FLAG_DISCARD, ubd_dev->queue); in ubd_open_dev()
808 blk_queue_flag_set(QUEUE_FLAG_NONROT, ubd_dev->queue); in ubd_open_dev()
875 disk->queue = ubd_devs[unit].queue; in ubd_disk_register()
918 ubd_dev->queue = disk->queue; in ubd_add()
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