| /arch/powerpc/platforms/ps3/ |
| D | hvcall.S | 19 std r0, 16(r1); \
24 ld r0, 16(r1); \
41 std r0, 16(r1); \
43 stdu r3, -8(r1); \
48 addi r1, r1, 8; \
49 ld r11, -8(r1); \
52 ld r0, 16(r1); \
60 std r0, 16(r1); \
62 std r3, -8(r1); \
63 stdu r4, -16(r1); \
[all …]
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| /arch/powerpc/kernel/ |
| D | idle_book3s.S | 52 std r1,PACAR1(r13)
60 std r2,-8*1(r1)
61 std r14,-8*2(r1)
62 std r15,-8*3(r1)
63 std r16,-8*4(r1)
64 std r17,-8*5(r1)
65 std r18,-8*6(r1)
66 std r19,-8*7(r1)
67 std r20,-8*8(r1)
68 std r21,-8*9(r1)
[all …]
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| D | entry_32.S | 106 stw r11, GPR1(r1)
107 stw r11, 0(r1)
109 stw r12, _LINK(r1)
114 SAVE_GPR(2, r1)
116 stw r9,_MSR(r1)
118 stw r12,8(r1)
119 stw r2,_TRAP(r1)
120 SAVE_GPR(0, r1)
121 SAVE_GPRS(3, 8, r1)
123 SAVE_NVGPRS(r1)
[all …]
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| D | interrupt_64.S | 32 ld r12,_NIP(r1)
38 ld r12,_MSR(r1)
43 ld r12,_NIP(r1)
49 ld r12,_MSR(r1)
62 mr r10,r1
63 ld r1,PACAKSAVE(r13)
64 std r10,0(r1)
65 std r11,_LINK(r1)
66 std r11,_NIP(r1) /* Saved LR is also the next instruction */
67 std r12,_MSR(r1)
[all …]
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| D | entry_64.S | 131 std r0,16(r1)
132 stdu r1,-SWITCH_FRAME_SIZE(r1)
134 SAVE_NVGPRS(r1)
135 std r0,_NIP(r1) /* Return to switch caller */
137 std r23,_CCR(r1)
138 std r1,KSP(r3) /* Set old stack pointer */
189 clrrdi r9,r1,28 /* get current sp ESID */
192 clrrdi r9,r1,40 /* get current sp 1T ESID */
251 mr r1,r8 /* start using new stack pointer */
254 ld r6,_CCR(r1)
[all …]
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| D | optprobes_head.S | 43 PPC_STLU r1,-INT_FRAME_SIZE(r1)
44 SAVE_GPR(0,r1)
46 addi r0,r1,INT_FRAME_SIZE
47 PPC_STL r0,GPR1(r1)
48 SAVE_30GPRS(r1)
51 PPC_STL r5,_MSR(r1)
53 PPC_STL r5,_TRAP(r1)
55 PPC_STL r5,ORIG_GPR3(r1)
56 PPC_STL r5,RESULT(r1)
58 PPC_STL r5,_CTR(r1)
[all …]
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| /arch/microblaze/kernel/ |
| D | mcount.S | 18 addik r1, r1, -120; \
19 swi r2, r1, 4; \
20 swi r3, r1, 8; \
21 swi r4, r1, 12; \
22 swi r5, r1, 116; \
23 swi r6, r1, 16; \
24 swi r7, r1, 20; \
25 swi r8, r1, 24; \
26 swi r9, r1, 28; \
27 swi r10, r1, 32; \
[all …]
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| D | entry.S | 178 swi r2, r1, PT_R2; /* Save SDA */ \
179 swi r3, r1, PT_R3; \
180 swi r4, r1, PT_R4; \
181 swi r5, r1, PT_R5; \
182 swi r6, r1, PT_R6; \
183 swi r7, r1, PT_R7; \
184 swi r8, r1, PT_R8; \
185 swi r9, r1, PT_R9; \
186 swi r10, r1, PT_R10; \
187 swi r11, r1, PT_R11; /* save clobbered regs after rval */\
[all …]
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| /arch/s390/kernel/ |
| D | reipl.S | 24 stg %r1,__LC_SAVE_AREA_RESTART
26 lghi %r1,__LC_GPREGS_SAVE_AREA
27 stmg %r0,%r15,0(%r1)
28 mvc 8(8,%r1),__LC_SAVE_AREA_RESTART
30 lghi %r1,__LC_CREGS_SAVE_AREA
31 stctg %c0,%c15,0(%r1)
33 lghi %r1,__LC_AREGS_SAVE_AREA
34 stam %a0,%a15,0(%r1)
36 lghi %r1,__LC_FPREGS_SAVE_AREA
37 std %f0, 0x00(%r1)
[all …]
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| /arch/nios2/boot/compressed/ |
| D | head.S | 25 movia r1, NIOS2_ICACHE_SIZE
27 1: initi r1
28 sub r1, r1, r2
29 bgt r1, r0, 1b
31 movia r1, NIOS2_DCACHE_SIZE
33 1: initd 0(r1)
34 sub r1, r1, r2
35 bgt r1, r0, 1b
37 nextpc r1 /* Find out where we are */
40 beq r1, r2, finish_move /* We are running in correct address,
[all …]
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| /arch/powerpc/kernel/trace/ |
| D | ftrace_64_mprofile.S | 37 std r0,LRSAVE(r1)
40 stdu r1, -STACK_FRAME_MIN_SIZE(r1)
43 stdu r1,-SWITCH_FRAME_SIZE(r1)
46 SAVE_GPR(0, r1)
47 SAVE_GPRS(2, 11, r1)
54 SAVE_GPRS(12, 31, r1)
57 addi r8, r1, SWITCH_FRAME_SIZE+STACK_FRAME_MIN_SIZE
58 std r8, GPR1(r1)
69 std r7, _NIP(r1)
71 std r7, LRSAVE+SWITCH_FRAME_SIZE(r1)
[all …]
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| /arch/arc/lib/ |
| D | strlen.S | 15 asl_s r1,r0,3
17 asl r7,r4,r1
19 sub r1,r2,r7
20 bic_s r1,r1,r2
24 or.eq r12,r12,r1
30 mov_s r1,31
31 sub3 r7,r1,r0
32 sub r1,r2,r4
33 bic_s r1,r1,r2
34 bmsk r1,r1,r7
[all …]
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| /arch/openrisc/kernel/ |
| D | entry.S | 46 l.sw -8(r1),r2 /* store frame pointer */ ;\
47 l.sw -4(r1),r9 /* store return address */ ;\
48 l.addi r2,r1,0 /* move sp to fp */ ;\
50 l.addi r1,r1,-8 ;\
51 l.ori r1,r2,0 /* restore sp */ ;\
52 l.lwz r9,-4(r1) /* restore return address */ ;\
53 l.lwz r2,-8(r1) /* restore fp */ ;\
59 l.sw -12(r1),t1 /* save extra reg */ ;\
60 l.sw -8(r1),r2 /* store frame pointer */ ;\
61 l.sw -4(r1),r9 /* store return address */ ;\
[all …]
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| /arch/arm/mach-sunxi/ |
| D | headsmp.S | 25 mrc p15, 0, r1, c0, c0, 0
28 and r1, r1, r2
31 cmp r1, r2
37 mrc p15, 1, r1, c15, c0, 4
38 orr r1, r1, #(0x1 << 31)
39 mcr p15, 1, r1, c15, c0, 4
42 mrc p15, 1, r1, c15, c0, 0
44 orr r1, r1, #(0x1 << 26)
46 orr r1, r1, #(0x1<<3)
47 mcr p15, 1, r1, c15, c0, 0
[all …]
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| /arch/hexagon/kernel/ |
| D | head.S | 39 r1.h = #HI(PAGE_OFFSET);
40 r1.l = #LO(PAGE_OFFSET);
41 r24 = sub(r24,r1); /* swapper_pg_dir - PAGE_OFFSET */
61 r1.l = #LO(_end);
66 r1.h = #HI(_end);
71 r1 = sub(r1, r2); define
74 r1 = add(r1, r3); /* + (4M-1) */ define
75 r26 = lsr(r1, #22); /* / 4M = # of entries */
77 r1 = r25; define
80 r1 = and(r1,r2); define
[all …]
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| /arch/csky/abiv2/ |
| D | strlen.S | 10 andi r1, r0, 3
13 bnez r1, .L_start_not_aligned
18 ldw r1, (r3)
19 tstnbz r1
22 ldw r1, (r3, 4)
24 tstnbz r1
27 ldw r1, (r3, 8)
29 tstnbz r1
32 ldw r1, (r3, 12)
34 tstnbz r1
[all …]
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| /arch/sh/lib/ |
| D | strlen.S | 26 mov.b @r4+,r1
27 tst r1,r1
31 mov.b @r4+,r1
32 tst r1,r1
36 mov.b @r4+,r1
37 tst r1,r1
44 mov.l @r4+,r1
45 cmp/str r3,r1
51 swap.b r1,r1
52 swap.w r1,r1
[all …]
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| /arch/arm/mach-tegra/ |
| D | sleep-tegra30.S | 225 str r12, [r1]
233 ldr r3, [r1] @ read CSR
234 str r3, [r1] @ clear CSR
306 mov32 r1, tegra30_iram_start
307 sub r0, r0, r1
308 mov32 r1, TEGRA_IRAM_LPx_RESUME_AREA
309 add r0, r0, r1
370 mov r1, #(1 << 28)
371 str r1, [r0, #CLK_RESET_SCLK_BURST]
372 str r1, [r0, #CLK_RESET_CCLK_BURST]
[all …]
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| /arch/powerpc/include/asm/ |
| D | ftrace.h | 18 stwu r1,-48(r1); \
19 stw r3, 12(r1); \
20 stw r4, 16(r1); \
21 stw r5, 20(r1); \
22 stw r6, 24(r1); \
24 lwz r4, 52(r1); \
26 stw r7, 28(r1); \
27 stw r8, 32(r1); \
28 stw r9, 36(r1); \
29 stw r10,40(r1); \
[all …]
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| /arch/nios2/kernel/ |
| D | head.S | 68 movia r1, NIOS2_ICACHE_SIZE
72 initi r1
73 sub r1, r1, r2
74 bgt r1, r0, icache_init
118 movia r1, NIOS2_DCACHE_SIZE
122 initd 0(r1)
123 sub r1, r1, r2
124 bgt r1, r0, dcache_init
126 nextpc r1 /* Find out where we are */
129 beq r1, r2,finish_move /* We are running in RAM done */
[all …]
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| /arch/s390/lib/ |
| D | mem.S | 20 lgr %r1,%r2
33 mvc 0(256,%r1),0(%r3)
34 la %r1,256(%r1)
44 stc %r0,0(%r4,%r1)
47 stc %r0,0(%r4,%r1)
50 mvc 0(1,%r1),0(%r3)
78 lgr %r1,%r2
81 xc 0(256,%r1),0(%r1)
82 la %r1,256(%r1)
91 lgr %r1,%r2
[all …]
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| /arch/arm/kernel/ |
| D | debug.S | 44 mov r1, #8
49 mov r1, #4
54 mov r1, #2
58 add r3, r2, r1
59 mov r1, #0
60 strb r1, [r3]
61 1: and r1, r0, #15
63 cmp r1, #10
64 addlt r1, r1, #'0'
65 addge r1, r1, #'a' - 10
[all …]
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| /arch/microblaze/lib/ |
| D | uaccess_old.S | 102 addik r1, r1, -40
103 swi r5, r1, 0
104 swi r6, r1, 4
105 swi r7, r1, 8
106 swi r19, r1, 12
107 swi r20, r1, 16
108 swi r21, r1, 20
109 swi r22, r1, 24
110 swi r23, r1, 28
111 swi r24, r1, 32
[all …]
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| /arch/arm/lib/ |
| D | memset.S | 20 and r1, r1, #255 @ cast to unsigned char
27 1: orr r1, r1, r1, lsl #8
28 orr r1, r1, r1, lsl #16
29 mov r3, r1
42 mov r8, r1
46 stmiage ip!, {r1, r3, r8, lr} @ 64 bytes at a time.
47 stmiage ip!, {r1, r3, r8, lr}
48 stmiage ip!, {r1, r3, r8, lr}
49 stmiage ip!, {r1, r3, r8, lr}
56 stmiane ip!, {r1, r3, r8, lr}
[all …]
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| /arch/parisc/kernel/ |
| D | syscall.S | 113 ssm PSW_SM_W, %r1
114 extrd,u %r1,PSW_W_BIT,1,%r1
117 or,ev %r1,%r30,%r30
134 mfsp %sr7,%r1 /* save user sr7 */
136 mtsp %r1,%sr3 /* and store it in sr3 */
138 mfctl %cr30,%r1
139 xor %r1,%r30,%r30 /* ye olde xor trick */
140 xor %r1,%r30,%r1
141 xor %r1,%r30,%r30
153 STREGM %r1,FRAME_SIZE(%r30) /* save r1 (usp) here for now */
[all …]
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