| /arch/hexagon/kernel/ |
| D | head.S | 36 r2.h = #0xffc0;
37 r2.l = #0x0000;
38 r25 = and(r2,r25); /* R25 holds PHYS_OFFSET now */
62 r2.l = #LO(stext);
67 r2.h = #HI(stext);
71 r1 = sub(r1, r2);
78 r2.h = #0xffc0;
79 r2.l = #0x0000; /* round back down to 4MB boundary */
80 r1 = and(r1,r2);
81 r2 = lsr(r1, #22) /* 4MB page number */ define
[all …]
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| /arch/sh/lib/ |
| D | __clear_user.S | 22 mov r4, r2
27 add #31, r2
28 and r1, r2
29 cmp/eq r4, r2
31 mov r2, r3
34 mov r4, r2
37 0: mov.b r0, @r2
39 add #1, r2
42 mov r2, r4
47 cmp/hi r2, r3
[all …]
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| /arch/arm/mach-socfpga/ |
| D | self-refresh.S | 49 mrc p15, 0, r2, c15, c0, 0
50 orr r2, r2, #1
51 mcr p15, 0, r2, c15, c0, 0
54 ldr r2, [r0, #SDR_CTRLGRP_LOWPWREQ_ADDR]
55 orr r2, r2, #SELFRSHREQ_MASK
56 str r2, [r0, #SDR_CTRLGRP_LOWPWREQ_ADDR]
61 ldr r2, [r0, #SDR_CTRLGRP_LOWPWRACK_ADDR]
62 and r2, r2, #SELFRFSHACK_MASK
63 cmp r2, #SELFRFSHACK_MASK
90 ldr r2, [r0, #SDR_CTRLGRP_LOWPWREQ_ADDR]
[all …]
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| /arch/arm/lib/ |
| D | findbit.S | 24 mov r2, #0
26 ARM( ldrb r3, [r0, r2, lsr #3] )
27 THUMB( lsr r3, r2, #3 )
31 add r2, r2, #8 @ next bit pointer
32 2: cmp r2, r1 @ any more?
43 cmp r2, r1
45 ands ip, r2, #7
47 ARM( ldrb r3, [r0, r2, lsr #3] )
48 THUMB( lsr r3, r2, #3 )
53 orr r2, r2, #7 @ if zero, then no bits here
[all …]
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| D | bitops.h | 11 mov r2, #1
20 mov r3, r2, lsl r3
21 1: ldrex r2, [r1]
22 \instr r2, r2, r3
23 strex r0, r2, [r1]
36 mov r2, #1
40 mov r3, r2, lsl r3 @ create mask
47 1: ldrex r2, [r1]
48 ands r0, r2, r3 @ save old value of bit
49 \instr r2, r2, r3 @ toggle bit
[all …]
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| D | getuser.S | 33 check_uaccess r0, 1, r1, r2, __get_user_bad
34 1: TUSER(ldrb) r2, [r0]
41 check_uaccess r0, 2, r1, r2, __get_user_bad
44 2: TUSER(ldrh) r2, [r0]
50 2: ldrbt r2, [r0], #1
54 2: ldrb r2, [r0]
58 orr r2, r2, rb, lsl #8
60 orr r2, rb, r2, lsl #8
71 check_uaccess r0, 4, r1, r2, __get_user_bad
72 4: TUSER(ldr) r2, [r0]
[all …]
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| D | io-writesw-armv4.S | 26 sub r2, r2, #1
30 teq r2, #0
37 subs r2, r2, #8
41 subs r2, r2, #8
48 .Lno_outsw_8: tst r2, #4
55 .Lno_outsw_4: movs r2, r2, lsl #31
79 subcs r2, r2, #1
81 subs r2, r2, #2
88 subs r2, r2, #2
93 tst r2, #1
|
| /arch/hexagon/lib/ |
| D | memset.S | 29 p0 = cmp.eq(r2, #0)
30 p1 = cmp.gtu(r2, #7)
47 loop0(1f, r2) /* byte loop */
59 p1 = cmp.eq(r2, #1)
72 p1 = cmp.eq(r2, #2)
84 p0 = cmp.gtu(r2, #7)
85 p1 = cmp.eq(r2, #4)
91 p0 = cmp.gtu(r2, #11)
97 r10 = lsr(r2, #3)
114 p1 = cmp.eq(r2, #8)
[all …]
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| D | umodsi3.S | 10 r2 = cl0(r0) define
15 r2 = sub(r3,r2) define
19 loop0(1f,r2)
20 p1 = cmp.eq(r2,#0)
21 r2 = lsl(r1,r2) define
26 p0 = cmp.gtu(r2,r0)
27 if (!p0.new) r0 = sub(r0,r2)
28 r2 = lsr(r2,#1) define
32 p0 = cmp.gtu(r2,r0)
|
| D | modsi3.S | 11 r2 = abs(r0) define
15 r3 = cl0(r2)
17 p0 = cmp.gtu(r1,r2)
26 r0 = r2
27 r2 = lsl(r1,r3) define
32 p0 = cmp.gtu(r2,r0)
33 if (!p0.new) r0 = sub(r0,r2)
34 r2 = lsr(r2,#1) define
38 p0 = cmp.gtu(r2,r0)
|
| /arch/arc/lib/ |
| D | strchr-700.S | 16 bmsk r2,r0,1
19 breq.d r2,r0,.Laligned
21 sub_s r0,r0,r2
22 asl r7,r2,3
23 ld_s r2,[r0]
31 sub r12,r2,r7
32 bic_s r12,r12,r2
35 xor r6,r2,r5
36 ld.a r2,[r0,4]
47 bic r2,r7,r6
[all …]
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| D | strcmp.S | 16 or r2,r0,r1
17 bmsk_s r2,r2,1
18 brne r2,0,.Lcharloop
22 ld.ab r2,[r0,4]
25 sub r4,r2,r12
26 bic r4,r4,r2
29 breq r2,r3,.Lwordloop
31 xor r0,r2,r3 ; mask for difference
36 and_s r2,r2,r0
39 cmp_s r2,r3
[all …]
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| D | strcmp-archs.S | 9 or r2, r0, r1
10 bmsk_s r2, r2, 1
11 brne r2, 0, @.Lcharloop
14 ld.ab r2, [r0, 4]
22 sub r4, r2, r12
24 bic r4, r4, r2
28 cmp r2, r3
30 mov.eq r2, r5
36 swape r2, r2
40 cmp_s r2, r3
[all …]
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| D | strcpy-700.S | 19 or r2,r0,r1
20 bmsk_s r2,r2,1
21 brne.d r2,0,charloop
27 sub r2,r3,r8
28 bic_s r2,r2,r3
29 tst_s r2,r12
38 sub r2,r3,r8
39 bic_s r2,r2,r3
40 tst_s r2,r12
43 sub r2,r4,r8
[all …]
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| /arch/arm/mach-imx/ |
| D | suspend-imx53.S | 49 add r2, r0, #SUSPEND_INFO_MX53_IO_STATE_OFFSET
53 ldr r5, [r2], #12 /* IOMUXC register offset */
55 str r6, [r2], #4 /* save area */
62 ldr r2,[r1, #M4IF_MCR0_OFFSET]
63 orr r2, r2, #M4IF_MCR0_FDVFS
64 str r2,[r1, #M4IF_MCR0_OFFSET]
68 ldr r2,[r1, #M4IF_MCR0_OFFSET]
69 ands r2, r2, #M4IF_MCR0_FDVACK
77 add r2, r0, #SUSPEND_INFO_MX53_IO_STATE_OFFSET
81 ldr r5, [r2], #4 /* IOMUXC register offset */
[all …]
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| /arch/nios2/boot/compressed/ |
| D | head.S | 26 movui r2, NIOS2_ICACHE_LINE_SIZE
28 sub r1, r1, r2
32 movui r2, NIOS2_DCACHE_LINE_SIZE
34 sub r1, r1, r2
39 movia r2, chkadr
40 beq r1, r2, finish_move /* We are running in correct address,
44 movia r2, _start /* Destination */
47 stw r8, 0(r2) /* stort a word to dest [r2] */
49 addi r2, r2, 4 /* inc the dest addr */
50 blt r2, r3, 1b
[all …]
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| /arch/nds32/lib/ |
| D | copy_template.S | 6 beqz $r2, quit_memcpy
7 srli $r3, $r2, #5 ! check if len < cache-line size 32
14 sub $r2, $r2, $r4 ! update $R2
21 beqz $r2, quit_memcpy
29 sub $r2, $r2, $r3 ! update $R2
36 beqz $r2, quit_memcpy
38 addi $r3, $r2, #-32 ! to check $r2< cache_line , than go to word_copy
41 srli $r3, $r2, #5
50 andi $r2, $r2, #31
52 beqz $r2, quit_memcpy
[all …]
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| /arch/arm/mach-omap2/ |
| D | sleep43xx.S | 69 ldr r2, [r3, #AMX3_PM_RO_SRAM_DATA_VIRT_OFFSET]
70 str r4, [r2, #AMX3_PM_WFI_FLAGS_OFFSET]
122 mov r2, r0
123 ldr r0, [r2, #L2X0_AUX_CTRL]
125 ldr r0, [r2, #L310_PREFETCH_CTRL]
129 str r0, [r2, #L2X0_CLEAN_INV_WAY]
131 ldr r0, [r2, #L2X0_CLEAN_INV_WAY]
144 mov r2, r0
146 str r0, [r2, #L2X0_CACHE_SYNC]
148 ldr r0, [r2, #L2X0_CACHE_SYNC]
[all …]
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| /arch/arm/kernel/ |
| D | debug.S | 55 printhex: adr r2, hexbuf_rel
56 ldr r3, [r2]
57 add r2, r2, r3
58 add r3, r2, r1
67 teq r3, r2
69 mov r0, r2
84 addruart_current r3, r1, r2
93 waituartcts r2, r3
95 waituarttxrdy r2, r3
97 busyuart r2, r3
[all …]
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| D | iwmmxt.S | 74 XSC(mrc p15, 0, r2, c15, c1, 0)
75 PJ4(mrc p15, 0, r2, c1, c0, 2)
77 XSC(tst r2, #0x3)
78 PJ4(tst r2, #0xf)
81 XSC(orr r2, r2, #0x3)
82 XSC(mcr p15, 0, r2, c15, c1, 0)
83 PJ4(orr r2, r2, #0xf)
84 PJ4(mcr p15, 0, r2, c1, c0, 2)
88 ldr r2, [sp, #60] @ current task pc value
91 sub r2, r2, #4 @ adjust pc back
[all …]
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| /arch/sh/kernel/cpu/sh2/ |
| D | entry.S | 43 mov.l r2,@-sp
46 mov.l $cpu_mode,r2
52 add r3,r2
54 mov.l @r2,r0
62 mov.l r0,@r2 ! enter kernel mode
63 mov.l $current_thread_info,r2
69 add r0,r2
71 mov.l @r2,r2
74 add r2,r0
75 mov r15,r2 ! r2 = user stack top
[all …]
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| /arch/parisc/kernel/ |
| D | syscall.S | 163 STREG %r2, TASK_PT_GR2(%r1) /* preserve rp */
166 LDREGM -FRAME_SIZE(%r30), %r2 /* get users sp back */
168 extrd,u %r2,63,1,%r19 /* W hidden in bottom bit */
170 xor %r19,%r2,%r2 /* clear bottom bit */
175 STREG %r2, TASK_PT_GR30(%r1) /* ... and save it */
200 copy %r19,%r2 /* W bit back to r2 */
220 or,= %r2,%r2,%r2
223 or,= %r2,%r2,%r2
238 ldi __NR_rt_sigreturn,%r2
239 comb,= %r2,%r20,.Lrt_sigreturn
[all …]
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| /arch/nios2/kernel/ |
| D | head.S | 69 movui r2, NIOS2_ICACHE_LINE_SIZE
73 sub r1, r1, r2
119 movui r2, NIOS2_DCACHE_LINE_SIZE
123 sub r1, r1, r2
128 movia r2, chkadr
129 beq r1, r2,finish_move /* We are running in RAM done */
131 movia r2, _start /* Destination */
136 stw r8, 0(r2) /* store a word to dest [r2] */
137 flushd 0(r2) /* Flush cache for safety */
139 addi r2, r2, 4 /* inc the dest addr */
[all …]
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| /arch/csky/abiv2/ |
| D | memcmp.S | 12 cmplti r2, 4
24 zext r18, r2, 31, 4
58 zext r18, r2, 3, 2
71 zext r18, r2, 1, 0
91 xtrb0 r2, r21
92 subu r0, r2
97 xtrb1 r2, r21
98 subu r0, r2
103 xtrb2 r2, r21
104 subu r0, r2
[all …]
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| /arch/s390/kernel/ |
| D | text_amode31.S | 30 lgr %r1,%r2
31 lgr %r2,%r3
35 diag %r1,%r2,0x14
41 lgfr %r2,%r5
50 lgr %r1,%r2
51 lhi %r2,-1
55 ipm %r2
56 srl %r2,28
59 lgfr %r2,%r2
70 diag %r2,%r4,0x26c
[all …]
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