/arch/ia64/lib/ |
D | idiv64.S | 29 # define INT_TO_FP(a,b) fcvt.xuf.s1 a=b 30 # define FP_TO_INT(a,b) fcvt.fxu.trunc.s1 a=b 34 # define FP_TO_INT(a,b) fcvt.fx.trunc.s1 a=b 51 frcpa.s1 f11, p6 = f8, f9 // y0 = frcpa(b) 53 (p6) fmpy.s1 f7 = f8, f11 // q0 = a*y0 54 (p6) fnma.s1 f6 = f9, f11, f1 // e0 = -b*y0 + 1 56 (p6) fma.s1 f10 = f7, f6, f7 // q1 = q0*e0 + q0 57 (p6) fmpy.s1 f7 = f6, f6 // e1 = e0*e0 62 (p6) fma.s1 f10 = f10, f7, f10 // q2 = q1*e1 + q1 63 (p6) fma.s1 f6 = f11, f6, f11 // y1 = y0*e0 + y0 [all …]
|
D | idiv32.S | 30 # define INT_TO_FP(a,b) fcvt.xuf.s1 a=b 31 # define FP_TO_INT(a,b) fcvt.fxu.trunc.s1 a=b 36 # define FP_TO_INT(a,b) fcvt.fx.trunc.s1 a=b 61 frcpa.s1 f6, p6 = f8, f9 // y0 = frcpa(b) 63 (p6) fmpy.s1 f8 = f8, f6 // q0 = a*y0 64 (p6) fnma.s1 f6 = f9, f6, f1 // e0 = -b*y0 + 1 69 (p6) fma.s1 f8 = f6, f8, f8 // q1 = e0*q0 + q0 70 (p6) fma.s1 f6 = f6, f6, f7 // e1 = e0*e0 + 2^-34 75 (p6) fma.s1 f6 = f6, f8, f8 // q2 = e1*q1 + q1
|
D | xor.S | 33 .rotr s1[6+1], s2[6+1], d[2] 36 (p[0]) ld8.nta s1[0] = [r16], 8 38 (p[6]) xor d[0] = s1[6], s2[6] 72 .rotr s1[6+1], s2[6+1], s3[6+1], d[2] 75 (p[0]) ld8.nta s1[0] = [r16], 8 77 (p[6]) xor d[0] = s1[6], s2[6] 114 .rotr s1[6+1], s2[6+1], s3[6+1], s4[6+1], d[2] 117 (p[0]) ld8.nta s1[0] = [r16], 8 119 (p[6]) xor d[0] = s1[6], s2[6] 159 .rotr s1[6+1], s2[6+1], s3[6+1], s4[6+1], s5[6+1], d[2] [all …]
|
/arch/s390/lib/ |
D | string.c | 233 int strcmp(const char *s1, const char *s2) in strcmp() argument 246 : [ret] "+&d" (ret), [s1] "+&a" (s1), [s2] "+&a" (s2) in strcmp() 273 static inline int clcle(const char *s1, unsigned long l1, in clcle() argument 276 union register_pair r1 = { .even = (unsigned long)s1, .odd = l1, }; in clcle() 297 char *strstr(const char *s1, const char *s2) in strstr() argument 303 return (char *) s1; in strstr() 304 l1 = __strend(s1) - s1; in strstr() 308 cc = clcle(s1, l2, s2, l2); in strstr() 310 return (char *) s1; in strstr() 311 s1++; in strstr() [all …]
|
/arch/sparc/include/asm/ |
D | prom.h | 23 #define of_compat_cmp(s1, s2, l) strncmp((s1), (s2), (l)) argument 24 #define of_prop_cmp(s1, s2) strcasecmp((s1), (s2)) argument 25 #define of_node_cmp(s1, s2) strcmp((s1), (s2)) argument
|
/arch/x86/boot/ |
D | string.c | 32 int memcmp(const void *s1, const void *s2, size_t len) in memcmp() argument 36 : CC_OUT(nz) (diff), "+D" (s1), "+S" (s2), "+c" (len)); in memcmp() 43 int bcmp(const void *s1, const void *s2, size_t len) in bcmp() argument 45 return memcmp(s1, s2, len); in bcmp() 50 const unsigned char *s1 = (const unsigned char *)str1; in strcmp() local 54 while (*s1 || *s2) { in strcmp() 55 delta = *s1 - *s2; in strcmp() 58 s1++; in strcmp() 171 char *strstr(const char *s1, const char *s2) in strstr() argument 177 return (char *)s1; in strstr() [all …]
|
D | string.h | 12 int memcmp(const void *s1, const void *s2, size_t len); 22 extern char *strstr(const char *s1, const char *s2);
|
/arch/powerpc/boot/ |
D | string.h | 11 extern int strcmp(const char *s1, const char *s2); 12 extern int strncmp(const char *s1, const char *s2, size_t n); 20 extern int memcmp(const void *s1, const void *s2, size_t n);
|
/arch/arm64/crypto/ |
D | poly1305-armv8.pl | 47 my ($h0,$h1,$h2,$r0,$r1,$s1,$t0,$t1,$d0,$d1,$d2) = map("x$_",(4..14)); 78 mov $s1,#0xfffffffc0fffffff 79 movk $s1,#0x0fff,lsl#48 84 and $r0,$r0,$s1 // &=0ffffffc0fffffff 85 and $s1,$s1,#-4 86 and $r1,$r1,$s1 // &=0ffffffc0ffffffc 87 mov w#$s1,#-1 89 str w#$s1,[$ctx,#48] // impossible key power value 146 add $s1,$r1,$r1,lsr#2 // s1 = r1 + (r1 >> 2) 165 mul $t0,$h1,$s1 // h1*5*r1 [all …]
|
/arch/mips/include/asm/mach-loongson64/ |
D | kernel-entry-init.h | 96 lw s1, 0x20(a0) /* check PC as an indicator */ 97 beqz s1, 2b 98 ld s1, 0x20(a0) /* get PC via mailbox reg0 */ 102 jr s1 /* jump to initial PC */
|
/arch/riscv/kernel/ |
D | kexec_relocate.S | 30 mv s1, a1 110 mv a2, s1 120 mv s1, zero 164 mv s1, a2 173 mv a1, s1 184 mv s1, zero
|
D | entry.S | 86 csrrc s1, CSR_STATUS, t0 92 REG_S s1, PT_STATUS(sp) 117 and a0, s1, a0 141 andi t0, s1, SR_PIE 252 andi s1, s0, _TIF_WORK_MASK 253 bnez s1, work_pending 271 REG_L s1, PT_STATUS(sp) 272 andi t0, s1, SR_PIE 357 andi s1, s0, _TIF_NEED_RESCHED 358 bnez s1, work_resched [all …]
|
/arch/arm/boot/dts/ |
D | aspeed-bmc-ampere-mtjade.dts | 151 channels = "s0", "s1"; 160 channels = "s0", "s1"; 169 channels = "s0", "s1"; 178 channels = "s0", "s1"; 187 channels = "s0", "s1"; 196 channels = "s0", "s1"; 205 channels = "s0", "s1"; 214 channels = "s0", "s1"; 223 channels = "s0", "s1"; 232 channels = "s0", "s1"; [all …]
|
/arch/mips/kernel/ |
D | relocate_kernel.S | 23 PTR_L s1, kexec_start_address 100 j s1 113 PTR_L s1, kexec_start_address 135 j s1
|
/arch/m68k/include/asm/ |
D | uaccess.h | 203 #define ____constant_copy_from_user_asm(res, to, from, tmp, n1, n2, n3, s1, s2, s3)\ argument 205 "1: "MOVES"."#s1" (%2)+,%3\n" \ 206 " move."#s1" %3,(%1)+\n" \ 241 #define ___constant_copy_from_user_asm(res, to, from, tmp, n1, n2, n3, s1, s2, s3)\ argument 242 ____constant_copy_from_user_asm(res, to, from, tmp, n1, n2, n3, s1, s2, s3) 294 #define __constant_copy_to_user_asm(res, to, from, tmp, n, s1, s2, s3) \ argument 296 " move."#s1" (%2)+,%3\n" \ 297 "11: "MOVES"."#s1" %3,(%1)+\n" \
|
/arch/mips/boot/compressed/ |
D | head.S | 21 move s1, a1 40 move a1, s1
|
/arch/x86/crypto/ |
D | twofish-x86_64-asm_64.S | 21 #define s1 1024 /* S1 Array */ macro 68 mov s1(%r11,%rdi,4),%r8d;\ 85 xor s1(%r11,%rdi,4),%r9d;\ 106 mov s1(%r11,%rdi,4),%r8d;\ 123 xor s1(%r11,%rdi,4),%r9d;\ 146 xor s1(%r11,%rdi,4),%r9d;\ 153 xor s1(%r11,%rdi,4),%r8d;\ 188 xor s1(%r11,%rdi,4),%r9d;\ 190 xor s1(%r11,%rdi,4),%r8d;\
|
D | twofish-i586-asm_32.S | 27 #define s1 1024 /* S1 Array */ macro 70 mov s1(%ebp,%edi,4),d ## D;\ 87 xor s1(%ebp,%edi,4),%esi;\ 108 mov s1(%ebp,%edi,4),d ## D;\ 125 xor s1(%ebp,%edi,4),%esi;\ 150 xor s1(%ebp,%edi,4),c ## D;\ 157 xor s1(%ebp,%edi,4),%esi;\ 188 xor s1(%ebp,%edi,4),c ## D;\ 195 xor s1(%ebp,%edi,4),%esi;\
|
/arch/mips/include/asm/ |
D | regdef.h | 43 #define s1 $17 macro 86 #define s1 $17 macro
|
D | asmmacro-64.h | 19 LONG_S s1, THREAD_REG17(\thread) 32 LONG_L s1, THREAD_REG17(\thread)
|
/arch/arm/crypto/ |
D | sha2-ce-core.S | 44 .macro add_update, ev, s0, s1, s2, s3 45 sha256su0.32 q\s0, q\s1 46 add_only \ev, \s1
|
D | sha512-armv4.pl | 559 my ($t0,$t1,$s0,$s1) = map("q$_",(12..15)); # temps 567 vshr.u64 $s1,@X[($i+7)%8],#@sigma1[2] 571 veor $s1,$t0 573 veor $s1,$t1 @ sigma1(X[i+14]) 575 vadd.i64 @X[$i%8],$s1 576 vshr.u64 $s1,$s0,#@sigma0[2] 580 veor $s1,$t0 584 veor $s1,$t1 @ sigma0(X[i+1]) 586 vadd.i64 @X[$i%8],$s1
|
D | sha1-ce-core.S | 48 .macro add_update, op, ev, rc, s0, s1, s2, s3, dg1 49 sha1su0.32 q\s0, q\s1, q\s2 50 add_only \op, \ev, \rc, \s1, \dg1
|
/arch/mips/power/ |
D | hibernate_asm.S | 21 PTR_S s1, PT_R17(t0) 51 PTR_L s1, PT_R17(t0)
|
/arch/mips/alchemy/devboards/ |
D | db1000.c | 446 int c0, c1, d0, d1, s0, s1, flashsize = 32, twosocks = 1; in db1000_dev_setup() local 456 s1 = AU1500_GPIO4_INT; in db1000_dev_setup() 463 s1 = AU1100_GPIO4_INT; in db1000_dev_setup() 499 s1 = AU1000_GPIO4_INT; in db1000_dev_setup() 547 irq_set_irq_type(s1, IRQ_TYPE_LEVEL_LOW); in db1000_dev_setup()
|