| /arch/riscv/kernel/ |
| D | kexec_relocate.S | 33 mv s4, zero
69 andi s4, t0, ~0x1
98 REG_S t1, (s4) /* *dst_ptr = *src_ptr */
100 addi s4, s4, RISCV_SZPTR /* dst_ptr++ */
123 mv s4, zero
187 mv s4, zero
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| D | entry.S | 89 csrr s4, CSR_CAUSE
95 REG_S s4, PT_CAUSE(sp)
127 bge s4, zero, 1f
145 beq s4, t0, 1f
155 beq s4, t0, handle_syscall
158 slli t0, s4, RISCV_LGPTR
488 csrr s4, CSR_CAUSE
494 REG_S s4, PT_CAUSE(sp)
537 REG_S s4, TASK_THREAD_S4_RA(a3)
552 REG_L s4, TASK_THREAD_S4_RA(a4)
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| D | crash_save_regs.S | 33 REG_S s4, PT_S4(a0) /* x20 */
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| /arch/mips/kernel/ |
| D | relocate_kernel.S | 38 and s4, s2, ~0x1 /* store destination addr in s4 */
63 REG_S s5, (s4)
64 PTR_ADDIU s4, s4, SZREG
|
| D | cps-vec-ns16550.S | 107 move s4, a0
110 move a0, s4
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| /arch/ia64/lib/ |
| D | xor.S | 114 .rotr s1[6+1], s2[6+1], s3[6+1], s4[6+1], d[2]
121 (p[0]) ld8.nta s4[0] = [r19], 8
122 (p[6]) xor r20 = s3[6], s4[6]
159 .rotr s1[6+1], s2[6+1], s3[6+1], s4[6+1], s5[6+1], d[2]
166 (p[0]) ld8.nta s4[0] = [r19], 8
167 (p[6]) xor r21 = s3[6], s4[6]
|
| /arch/arm64/crypto/ |
| D | sm3-ce-core.S | 51 .macro qround, ab, s0, s1, s2, s3, s4 argument
52 .ifnb \s4
53 ext \s4\().16b, \s1\().16b, \s2\().16b, #12
56 sm3partw1 \s4\().4s, \s0\().4s, \s3\().4s
66 .ifnb \s4
67 sm3partw2 \s4\().4s, v7.4s, v6.4s
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| /arch/mips/include/asm/ |
| D | regdef.h | 46 #define s4 $20 macro
89 #define s4 $20 macro
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| D | asmmacro-64.h | 22 LONG_S s4, THREAD_REG20(\thread)
35 LONG_L s4, THREAD_REG20(\thread)
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| D | asmmacro-32.h | 69 LONG_S s4, THREAD_REG20(\thread)
82 LONG_L s4, THREAD_REG20(\thread)
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| /arch/x86/include/asm/uv/ |
| D | uv_mmrs.h | 781 } s4; member
1469 } s4; member
2050 } s4; member
2162 } s4; member
2230 } s4; member
2319 } s4; member
2422 } s4; member
2525 } s4; member
2628 } s4; member
2688 } s4; member
[all …]
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| /arch/mips/power/ |
| D | hibernate_asm.S | 24 PTR_S s4, PT_R20(t0)
54 PTR_L s4, PT_R20(t0)
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| /arch/x86/crypto/ |
| D | poly1305-x86_64-cryptogams.pl | 1029 vpmuludq $T2,$H4,$T2 # h2*s4
1033 vpaddq $T2,$D1,$D1 # d1 += h2*s4
1034 vpmuludq $T3,$H4,$T3 # h3*s4
1035 vpmuludq $T4,$H4,$T4 # h4*s4
1037 vpaddq $T3,$D2,$D2 # d2 += h3*s4
1038 vpaddq $T4,$D3,$D3 # d3 += h4*s4
1041 vpmuludq $T1,$H4,$T0 # h1*s4
1045 vpaddq $T0,$D0,$D0 # d0 += h1*s4
1134 vpmuludq $H2,$T4,$H2 # h2*s4
1135 vpmuludq $H3,$T4,$H3 # h3*s4
[all …]
|
| D | aegis128-aesni-asm.S | 383 .macro encrypt_block a s0 s1 s2 s3 s4 i
387 pxor \s4, T0
394 pxor MSG, \s4
538 .macro decrypt_block a s0 s1 s2 s3 s4 i
541 pxor \s4, MSG
548 pxor MSG, \s4
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| D | des3_ede-asm_64.S | 16 #define s4 ((s3) + (64*8)) macro
17 #define s5 ((s4) + (64*8))
137 xorq s4(, RT2, 8), RT0; \
363 xorq s4(, RT3, 8), to##0; \
384 xorq s4(, RT3, 8), to##1; \
405 xorq s4(, RT3, 8), to##2; \
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| /arch/alpha/include/uapi/asm/ |
| D | regdef.h | 20 #define s4 $13 macro
|
| /arch/mips/fw/lib/ |
| D | call_o32.S | 52 REG_S s4,O32_FRAMESZ-7*SZREG(sp)
94 REG_L s4,O32_FRAMESZ-7*SZREG(sp)
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| /arch/riscv/include/uapi/asm/ |
| D | ptrace.h | 40 unsigned long s4; member
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| /arch/arm/boot/dts/ |
| D | elpida_ecb240abacn.dtsi | 8 compatible = "Elpida,ECB240ABACN","jedec,lpddr2-s4";
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| /arch/arm64/boot/dts/qcom/ |
| D | msm8916-pm8916.dtsi | 55 pm8916_s4: s4 {};
|
| D | sm8150-mtp.dts | 39 vreg_s4a_1p8: pm8150-s4 {
61 vdd-s4-supply = <&vph_pwr>;
216 vdd-s4-supply = <&vph_pwr>;
|
| D | sm8150-hdk.dts | 34 vreg_s4a_1p8: pm8150-s4 {
66 vdd-s4-supply = <&vph_pwr>;
225 vdd-s4-supply = <&vph_pwr>;
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| /arch/riscv/include/asm/ |
| D | ptrace.h | 36 unsigned long s4; member
|
| /arch/mips/crypto/ |
| D | chacha-core.S | 24 #define X13 $s4
223 sw $s4, 16($sp)
302 lw $s4, 16($sp)
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| D | poly1305-mips.pl | 42 ($s0,$s1,$s2,$s3,$s4,$s5,$s6,$s7,$s8,$s9,$s10,$s11)=map("\$$_",(12..23));
227 ($s0,$s1,$s2,$s3,$s4,$s5,$in0,$in1,$t2);
259 sd $s4,32($sp)
428 ld $s4,32($sp)
734 ($s0,$s1,$s2,$s3,$s4, $s5,$s6,$s7,$s8, $s9,$s10,$s11);
756 sw $s4, 4*4($sp)
1138 lw $s4, 4*4($sp)
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