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Searched refs:sys_clk (Results 1 – 25 of 31) sorted by relevance

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/arch/powerpc/boot/
D4xx.h22 void ibm405gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk);
23 void ibm405ep_fixup_clocks(unsigned int sys_clk);
24 void ibm405ex_fixup_clocks(unsigned int sys_clk, unsigned int uart_clk);
25 void ibm440gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk);
26 void ibm440ep_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk,
28 void ibm440gx_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk,
30 void ibm440spe_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk,
D4xx.c331 void ibm440gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk) in ibm440gp_fixup_clocks() argument
341 cpu = plb = sys_clk; in ibm440gp_fixup_clocks()
349 cpu = sys_clk * m / CPC0_SYS0_FWDVA(sys0); in ibm440gp_fixup_clocks()
350 plb = sys_clk * m / CPC0_SYS0_FWDVB(sys0); in ibm440gp_fixup_clocks()
359 tb = sys_clk; in ibm440gp_fixup_clocks()
379 (sys_clk + 500000) / 1000000, sys_clk); in ibm440gp_fixup_clocks()
397 static unsigned int __ibm440eplike_fixup_clocks(unsigned int sys_clk, in __ibm440eplike_fixup_clocks() argument
446 vco = sys_clk * m; in __ibm440eplike_fixup_clocks()
453 clk_a = clk_b = sys_clk; in __ibm440eplike_fixup_clocks()
512 void ibm440ep_fixup_clocks(unsigned int sys_clk, in ibm440ep_fixup_clocks() argument
[all …]
/arch/arm/boot/dts/
Duniphier-pro5.dtsi21 clocks = <&sys_clk 32>;
31 clocks = <&sys_clk 32>;
457 sys_clk: clock { label
477 clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>;
495 clocks = <&sys_clk 12>, <&sys_clk 14>;
504 clocks = <&sys_clk 12>, <&sys_clk 14>;
514 clocks = <&sys_clk 12>, <&sys_clk 14>;
525 clocks = <&sys_clk 12>, <&sys_clk 14>;
541 clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>;
559 clocks = <&sys_clk 12>, <&sys_clk 15>;
[all …]
Duniphier-pxs2.dtsi24 clocks = <&sys_clk 32>;
35 clocks = <&sys_clk 32>;
46 clocks = <&sys_clk 32>;
57 clocks = <&sys_clk 32>;
272 clocks = <&sys_clk 40>;
557 sys_clk: clock { label
583 clocks = <&sys_clk 6>;
605 clocks = <&sys_clk 14>, <&sys_clk 14>, <&sys_clk 14>;
624 clocks = <&sys_clk 14>;
633 clocks = <&sys_clk 14>;
[all …]
Duniphier-pro4.dtsi345 clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>,
361 clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>,
473 sys_clk: clock { label
492 clocks = <&sys_clk 12>, <&sys_clk 6>, <&sys_clk 7>,
493 <&sys_clk 10>;
515 clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>;
532 clocks = <&sys_clk 12>, <&sys_clk 14>;
542 clocks = <&sys_clk 12>, <&sys_clk 14>;
553 clocks = <&sys_clk 12>, <&sys_clk 14>;
568 clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>;
[all …]
Duniphier-ld4.dtsi295 clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>,
309 clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>,
323 clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 10>,
392 sys_clk: clock { label
414 clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
Duniphier-sld8.dtsi299 clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>,
313 clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>,
327 clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 10>,
396 sys_clk: clock { label
418 clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
Domap4.dtsi525 clock-names = "fck", "hdmi_clk", "sys_clk", "tv_clk";
559 clock-names = "fck", "sys_clk";
587 clock-names = "fck", "sys_clk";
605 clock-names = "sys_clk";
647 clock-names = "fck", "sys_clk";
682 clock-names = "fck", "sys_clk";
719 clock-names = "fck", "sys_clk";
Domap5.dtsi473 clock-names = "fck", "hdmi_clk", "sys_clk", "tv_clk";
575 clock-names = "fck", "sys_clk";
610 clock-names = "fck", "sys_clk";
645 clock-names = "fck", "sys_clk";
Dat91sam9x5_lcd.dtsi20 clock-names = "periph_clk","sys_clk", "slow_clk";
Dsama5d3_lcd.dtsi20 clock-names = "periph_clk","sys_clk", "slow_clk";
/arch/arm/mach-omap2/
Dtimer.c61 static struct clk *sys_clk; in realtime_counter_init() local
71 sys_clk = clk_get(NULL, "sys_clkin"); in realtime_counter_init()
72 if (IS_ERR(sys_clk)) { in realtime_counter_init()
78 rate = clk_get_rate(sys_clk); in realtime_counter_init()
79 clk_put(sys_clk); in realtime_counter_init()
Dvoltage.c252 sys_ck = clk_get(NULL, voltdm->sys_clk.name); in omap_voltage_late_init()
257 voltdm->sys_clk.rate = clk_get_rate(sys_ck); in omap_voltage_late_init()
258 WARN_ON(!voltdm->sys_clk.rate); in omap_voltage_late_init()
Dvoltagedomains54xx_data.c86 voltdm->sys_clk.name = sys_clk_name; in omap54xx_voltagedomains_init()
Dvoltagedomains3xxx_data.c128 voltdm->sys_clk.name = sys_clk_name; in omap3xxx_voltagedomains_init()
Dvoltagedomains44xx_data.c124 voltdm->sys_clk.name = sys_clk_name; in omap44xx_voltagedomains_init()
Dvoltage.h81 } sys_clk; member
Dvc.c378 val *= voltdm->sys_clk.rate / 8 / 1000000 + 1; in omap3_init_voltsetup1()
480 cycles = voltdm->sys_clk.rate / 1000 * time / 1000; in omap4_calc_volt_ramp()
690 switch (voltdm->sys_clk.rate) { in omap4_vc_i2c_timing_init()
708 voltdm->sys_clk.rate); in omap4_vc_i2c_timing_init()
Dvp.c59 sys_clk_rate = voltdm->sys_clk.rate / 1000; in omap_vp_init()
/arch/arm64/boot/dts/socionext/
Duniphier-pxs3.dtsi43 clocks = <&sys_clk 33>;
53 clocks = <&sys_clk 33>;
63 clocks = <&sys_clk 33>;
73 clocks = <&sys_clk 33>;
402 clocks = <&sys_clk 4>;
534 sys_clk: clock { label
564 clocks = <&sys_clk 6>;
585 clocks = <&sys_clk 7>;
607 clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>;
626 clocks = <&sys_clk 12>;
[all …]
Duniphier-ld20.dtsi46 clocks = <&sys_clk 32>;
56 clocks = <&sys_clk 32>;
66 clocks = <&sys_clk 33>;
76 clocks = <&sys_clk 33>;
356 clocks = <&sys_clk 40>;
416 clocks = <&sys_clk 41>, <&sys_clk 42>;
576 clocks = <&sys_clk 4>;
704 sys_clk: clock { label
734 clocks = <&sys_clk 6>;
757 clocks = <&sys_clk 14>, <&sys_clk 14>, <&sys_clk 14>;
[all …]
Duniphier-ld11.dtsi36 clocks = <&sys_clk 33>;
45 clocks = <&sys_clk 33>;
231 clocks = <&sys_clk 40>;
291 clocks = <&sys_clk 41>, <&sys_clk 42>;
446 clocks = <&sys_clk 4>;
466 clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>,
482 clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>,
498 clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 10>,
602 sys_clk: clock { label
623 clocks = <&sys_clk 6>;
[all …]
/arch/arm64/boot/dts/microchip/
Dsparx5.dtsi96 sys_clk: sys-clk { label
303 clocks = <&sys_clk>;
333 clocks = <&sys_clk>;
363 clocks = <&sys_clk>;
464 clocks = <&sys_clk>;
/arch/arm64/boot/dts/mediatek/
Dmt2712e.dtsi157 sys_clk: dummyclk { label
301 clocks = <&baud_clk>, <&sys_clk>;
428 clocks = <&baud_clk>, <&sys_clk>;
441 clocks = <&baud_clk>, <&sys_clk>;
454 clocks = <&baud_clk>, <&sys_clk>;
467 clocks = <&baud_clk>, <&sys_clk>;
684 clocks = <&baud_clk>, <&sys_clk>;
/arch/mips/boot/dts/pic32/
Dpic32mzda.dtsi233 clock-names = "base_clk", "sys_clk";

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