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Searched refs:uartclk (Results 1 – 25 of 76) sorted by relevance

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/arch/arm/mach-omap1/
Dserial.c71 .uartclk = OMAP16XX_BASE_BAUD * 16,
79 .uartclk = OMAP16XX_BASE_BAUD * 16,
87 .uartclk = OMAP16XX_BASE_BAUD * 16,
117 serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16; in omap_serial_init()
118 serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16; in omap_serial_init()
119 serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16; in omap_serial_init()
/arch/arm/mach-pxa/
Dcapc7117.c86 .uartclk = TI16C752_UARTCLK
95 .uartclk = TI16C752_UARTCLK
104 .uartclk = TI16C752_UARTCLK
113 .uartclk = TI16C752_UARTCLK
Dzeus.c242 .uartclk = 14745600,
251 .uartclk = 14745600,
260 .uartclk = 14745600,
269 .uartclk = 14745600,
279 .uartclk = 921600 * 16,
288 .uartclk = 921600 * 16,
297 .uartclk = 921600 * 16,
Dviper.c535 .uartclk = 921600 * 16,
544 .uartclk = 921600 * 16,
553 .uartclk = 921600 * 16,
563 .uartclk = 1843200,
573 .uartclk = 1843200,
/arch/mips/ath25/
Ddevices.c74 void __init ath25_serial_setup(u32 mapbase, int irq, unsigned int uartclk) in ath25_serial_setup() argument
86 s.uartclk = uartclk; in ath25_serial_setup()
Ddevices.h31 void ath25_serial_setup(u32 mapbase, int irq, unsigned int uartclk);
/arch/mips/mti-malta/
Dmalta-platform.c34 .uartclk = 1843200, \
50 .uartclk = 3686400, /* Twice the usual clk! */
/arch/arm/boot/dts/
Dhi3519.dtsi56 clock-names = "uartclk", "apb_pclk";
65 clock-names = "uartclk", "apb_pclk";
74 clock-names = "uartclk", "apb_pclk";
83 clock-names = "uartclk", "apb_pclk";
92 clock-names = "uartclk", "apb_pclk";
Darm-realview-eb.dtsi94 uartclk: uartclk@24M { label
357 clocks = <&uartclk>, <&pclk>;
358 clock-names = "uartclk", "apb_pclk";
364 clocks = <&uartclk>, <&pclk>;
365 clock-names = "uartclk", "apb_pclk";
371 clocks = <&uartclk>, <&pclk>;
372 clock-names = "uartclk", "apb_pclk";
378 clocks = <&uartclk>, <&pclk>;
379 clock-names = "uartclk", "apb_pclk";
Dintegratorcp.dts73 uartclk: uartclk@14.74M { label
246 clocks = <&uartclk>, <&pclk>;
247 clock-names = "uartclk", "apb_pclk";
252 clocks = <&uartclk>, <&pclk>;
253 clock-names = "uartclk", "apb_pclk";
276 clocks = <&uartclk>, <&pclk>;
Darm-realview-pb1176.dts104 uartclk: uartclk@24M { label
405 clocks = <&uartclk>, <&pclk>;
406 clock-names = "uartclk", "apb_pclk";
414 clocks = <&uartclk>, <&pclk>;
415 clock-names = "uartclk", "apb_pclk";
423 clocks = <&uartclk>, <&pclk>;
424 clock-names = "uartclk", "apb_pclk";
432 clocks = <&uartclk>, <&pclk>;
433 clock-names = "uartclk", "apb_pclk";
541 clocks = <&uartclk>, <&pclk>;
[all …]
Darm-realview-pbx.dtsi109 uartclk: uartclk@24M { label
355 clocks = <&uartclk>, <&pclk>;
356 clock-names = "uartclk", "apb_pclk";
362 clocks = <&uartclk>, <&pclk>;
363 clock-names = "uartclk", "apb_pclk";
369 clocks = <&uartclk>, <&pclk>;
370 clock-names = "uartclk", "apb_pclk";
548 clocks = <&uartclk>, <&pclk>;
549 clock-names = "uartclk", "apb_pclk";
Dintegratorap.dts75 uartclk: uartclk@14.74M { label
217 clocks = <&uartclk>, <&pclk>;
218 clock-names = "uartclk", "apb_pclk";
224 clocks = <&uartclk>, <&pclk>;
225 clock-names = "uartclk", "apb_pclk";
Darm-realview-pb11mp.dts210 uartclk: uartclk@24M { label
503 clocks = <&uartclk>, <&pclk>;
504 clock-names = "uartclk", "apb_pclk";
512 clocks = <&uartclk>, <&pclk>;
513 clock-names = "uartclk", "apb_pclk";
521 clocks = <&uartclk>, <&pclk>;
522 clock-names = "uartclk", "apb_pclk";
530 clocks = <&uartclk>, <&pclk>;
531 clock-names = "uartclk", "apb_pclk";
/arch/arm/mach-footbridge/
Disa.c52 .uartclk = 1843200,
60 .uartclk = 1843200,
/arch/mips/loongson2ef/common/
Dserial.c25 .uartclk = clk, \
34 .uartclk = clk, \
/arch/arm/mach-s3c/
Dmach-vr1000.c143 .uartclk = VR1000_BAUDBASE,
151 .uartclk = VR1000_BAUDBASE,
159 .uartclk = VR1000_BAUDBASE,
167 .uartclk = VR1000_BAUDBASE,
/arch/mips/bcm47xx/
Dserial.c44 p->uartclk = ssb_port->baud_base; in uart8250_init_ssb()
70 p->uartclk = bcma_port->baud_base; in uart8250_init_bcma()
/arch/sh/boards/mach-se/7343/
Dsetup.c78 .uartclk = 7372800,
85 .uartclk = 7372800,
/arch/arm64/boot/dts/arm/
Dfoundation-v8.dtsi196 clock-names = "uartclk", "apb_pclk";
204 clock-names = "uartclk", "apb_pclk";
212 clock-names = "uartclk", "apb_pclk";
220 clock-names = "uartclk", "apb_pclk";
Drtsm_ve-motherboard.dtsi174 clock-names = "uartclk", "apb_pclk";
182 clock-names = "uartclk", "apb_pclk";
190 clock-names = "uartclk", "apb_pclk";
198 clock-names = "uartclk", "apb_pclk";
/arch/mips/rb532/
Dserial.c50 rb532_uart.uartclk = idt_cpu_freq; in setup_serial_port()
/arch/mips/alchemy/common/
Dplatform.c103 long uartclk; in alchemy_setup_uarts() local
115 uartclk = clk_get_rate(clk); in alchemy_setup_uarts()
128 ports[s].uartclk = uartclk; in alchemy_setup_uarts()
/arch/mips/cobalt/
Dserial.c32 .uartclk = 18432000,
/arch/xtensa/platforms/xtfpga/
Dsetup.c241 .uartclk = 0, /* set in xtavnet_init() */
272 serial_platform_data[0].uartclk = *(long *)XTFPGA_CLKFRQ_VADDR; in xtavnet_init()

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