| /arch/powerpc/lib/ |
| D | xor_vmx.c | 55 DEFINE(v1); in __xor_altivec_2()
60 LOAD(v1); in __xor_altivec_2()
62 XOR(v1, v2); in __xor_altivec_2()
63 STORE(v1); in __xor_altivec_2()
65 v1 += 4; in __xor_altivec_2()
73 DEFINE(v1); in __xor_altivec_3()
79 LOAD(v1); in __xor_altivec_3()
82 XOR(v1, v2); in __xor_altivec_3()
83 XOR(v1, v3); in __xor_altivec_3()
84 STORE(v1); in __xor_altivec_3()
[all …]
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| D | memcpy_power7.S | 309 lvx v1,0,r4
311 stvx v1,0,r3
315 lvx v1,0,r4
318 stvx v1,0,r3
325 lvx v1,r4,r10
330 stvx v1,r3,r10
360 lvx v1,r4,r15
369 stvx v1,r3,r15
386 lvx v1,r4,r10
391 stvx v1,r3,r10
[all …]
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| D | copyuser_power7.S | 365 err3; lvx v1,0,r4
367 err3; stvx v1,0,r3
371 err3; lvx v1,0,r4
374 err3; stvx v1,0,r3
381 err3; lvx v1,r4,r10
386 err3; stvx v1,r3,r10
416 err4; lvx v1,r4,r15
425 err4; stvx v1,r3,r15
442 err3; lvx v1,r4,r10
447 err3; stvx v1,r3,r10
[all …]
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| /arch/s390/crypto/ |
| D | crc32le-vx.S | 130 VLM %v1,%v4,0,%r3 /* 64-bytes into V1..V4 */
131 VPERM %v1,%v1,%v1,CONST_PERM_LE2BE
136 VX %v1,%v0,%v1 /* V1 ^= CRC */
158 VGFMAG %v1,CONST_R2R1,%v1,%v5
175 VGFMAG %v1,CONST_R4R3,%v1,%v2
176 VGFMAG %v1,CONST_R4R3,%v1,%v3
177 VGFMAG %v1,CONST_R4R3,%v1,%v4
186 VGFMAG %v1,CONST_R4R3,%v1,%v2 /* Fold next data chunk */
217 VGFMG %v1,%v0,%v1
233 VSRLB %v2,%v1,%v9 /* Store remaining bits in V2 */
[all …]
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| D | crc32be-vx.S | 103 VLM %v1,%v4,0,%r3 /* 64-bytes into V1..V4 */
104 VX %v1,%v0,%v1 /* V1 ^= CRC */
123 VGFMAG %v1,CONST_R1R2,%v1,%v5
137 VGFMAG %v1,CONST_R3R4,%v1,%v2
138 VGFMAG %v1,CONST_R3R4,%v1,%v3
139 VGFMAG %v1,CONST_R3R4,%v1,%v4
148 VGFMAG %v1,CONST_R3R4,%v1,%v2 /* Fold next data chunk */
166 VGFMG %v1,CONST_R5,%v1
175 VGFMG %v1,CONST_R6,%v1
196 VUPLLF %v2,%v1
[all …]
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| /arch/arm64/crypto/ |
| D | aes-ce-ccm-core.S | 23 eor v1.16b, v1.16b, v1.16b
27 ins v1.b[0], w7
28 ext v1.16b, v1.16b, v1.16b, #1 /* rotate in the input bytes */
31 eor v0.16b, v0.16b, v1.16b
58 ld1 {v1.16b}, [x1], #16 /* load next input block */
59 eor v0.16b, v0.16b, v1.16b /* xor with mac */
77 9: ext v1.16b, v1.16b, v1.16b, #1
80 91: eor v0.16b, v0.16b, v1.16b
95 ld1 {v1.16b}, [x1] /* load 1st ctriv */
104 aese v1.16b, v4.16b
[all …]
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| D | aes-ce-core.S | 14 ld1 {v1.4s}, [x0], #16
18 mov v3.16b, v1.16b
20 0: mov v2.16b, v1.16b
24 2: ld1 {v1.4s}, [x0], #16
29 aese v0.16b, v1.16b
42 ld1 {v1.4s}, [x0], #16
46 mov v3.16b, v1.16b
48 0: mov v2.16b, v1.16b
52 2: ld1 {v1.4s}, [x0], #16
57 aesd v0.16b, v1.16b
[all …]
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| D | sm3-ce-core.S | 95 CPU_LE( rev32 v1.16b, v1.16b )
101 qround a, v0, v1, v2, v3, v4
102 qround a, v1, v2, v3, v4, v0
103 qround a, v2, v3, v4, v0, v1
104 qround a, v3, v4, v0, v1, v2
108 qround b, v4, v0, v1, v2, v3
109 qround b, v0, v1, v2, v3, v4
110 qround b, v1, v2, v3, v4, v0
111 qround b, v2, v3, v4, v0, v1
112 qround b, v3, v4, v0, v1, v2
[all …]
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| D | aes-modes.S | 26 encrypt_block4x v0, v1, v2, v3, w3, x2, x8, w7
31 decrypt_block4x v0, v1, v2, v3, w3, x2, x8, w7
37 encrypt_block5x v0, v1, v2, v3, v4, w3, x2, x8, w7
42 decrypt_block5x v0, v1, v2, v3, v4, w3, x2, x8, w7
148 eor v1.16b, v1.16b, v0.16b
149 encrypt_block v1, w3, x2, x6, w7
150 eor v2.16b, v2.16b, v1.16b
199 mov v6.16b, v1.16b
204 eor v1.16b, v1.16b, v5.16b
212 mov v5.16b, v1.16b
[all …]
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| D | chacha-neon-core.S | 46 add v0.4s, v0.4s, v1.4s
52 eor v4.16b, v1.16b, v2.16b
53 shl v1.4s, v4.4s, #12
54 sri v1.4s, v4.4s, #20
57 add v0.4s, v0.4s, v1.4s
63 eor v4.16b, v1.16b, v2.16b
64 shl v1.4s, v4.4s, #7
65 sri v1.4s, v4.4s, #25
68 ext v1.16b, v1.16b, v1.16b, #4
75 add v0.4s, v0.4s, v1.4s
[all …]
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| /arch/s390/include/asm/ |
| D | vx-insn.h | 94 .ifc \vxr,%v1
200 .macro RXB rxb v1 v2=0 v3=0 v4=0
202 .if \v1 & 0x10
224 .macro MRXB m v1 v2=0 v3=0 v4=0
226 RXB rxb, \v1, \v2, \v3, \v4
239 .macro MRXBOPC m opc v1 v2=0 v3=0 v4=0
240 MRXB \m, \v1, \v2, \v3, \v4
248 VX_NUM v1, \vr
249 .word (0xE700 | ((v1&15) << 4))
251 MRXBOPC 0, 0x44, v1
[all …]
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| /arch/arm64/lib/ |
| D | xor-neon.c | 19 register uint64x2_t v0, v1, v2, v3; in xor_arm64_neon_2() local
25 v1 = veorq_u64(vld1q_u64(dp1 + 2), vld1q_u64(dp2 + 2)); in xor_arm64_neon_2()
31 vst1q_u64(dp1 + 2, v1); in xor_arm64_neon_2()
47 register uint64x2_t v0, v1, v2, v3; in xor_arm64_neon_3() local
53 v1 = veorq_u64(vld1q_u64(dp1 + 2), vld1q_u64(dp2 + 2)); in xor_arm64_neon_3()
59 v1 = veorq_u64(v1, vld1q_u64(dp3 + 2)); in xor_arm64_neon_3()
65 vst1q_u64(dp1 + 2, v1); in xor_arm64_neon_3()
83 register uint64x2_t v0, v1, v2, v3; in xor_arm64_neon_4() local
89 v1 = veorq_u64(vld1q_u64(dp1 + 2), vld1q_u64(dp2 + 2)); in xor_arm64_neon_4()
95 v1 = veorq_u64(v1, vld1q_u64(dp3 + 2)); in xor_arm64_neon_4()
[all …]
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| /arch/powerpc/boot/dts/fsl/ |
| D | interlaken-lac-portals.dtsi | 39 compatible = "fsl,interlaken-lac-portal-v1.0";
44 compatible = "fsl,interlaken-lac-portal-v1.0";
49 compatible = "fsl,interlaken-lac-portal-v1.0";
54 compatible = "fsl,interlaken-lac-portal-v1.0";
59 compatible = "fsl,interlaken-lac-portal-v1.0";
64 compatible = "fsl,interlaken-lac-portal-v1.0";
69 compatible = "fsl,interlaken-lac-portal-v1.0";
74 compatible = "fsl,interlaken-lac-portal-v1.0";
79 compatible = "fsl,interlaken-lac-portal-v1.0";
84 compatible = "fsl,interlaken-lac-portal-v1.0";
[all …]
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| D | qoriq-raid1.0-0.dtsi | 36 compatible = "fsl,raideng-v1.0";
43 compatible = "fsl,raideng-v1.0-job-queue";
50 compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-hp-ring";
57 compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-lp-ring";
65 compatible = "fsl,raideng-v1.0-job-queue";
72 compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-hp-ring";
79 compatible = "fsl,raideng-v1.0-job-ring", "fsl,raideng-v1.0-lp-ring";
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| /arch/x86/lib/ |
| D | x86-opcode-map.txt | 28 # (v1): this opcode only supports 128bit VEX.
349 # Many AVX instructions lack v1 superscript, according to Intel AVX-Prgramming
351 10: vmovups Vps,Wps | vmovupd Vpd,Wpd (66) | vmovss Vx,Hx,Wss (F3),(v1) | vmovsd Vx,Hx,Wsd (F2),(v1)
352 … vmovups Wps,Vps | vmovupd Wpd,Vpd (66) | vmovss Wss,Hx,Vss (F3),(v1) | vmovsd Wsd,Hx,Vsd (F2),(v1)
353 12: vmovlps Vq,Hq,Mq (v1) | vmovhlps Vq,Hq,Uq (v1) | vmovlpd Vq,Hq,Mq (66),(v1) | vmovsldup Vx,Wx (…
354 13: vmovlps Mq,Vq (v1) | vmovlpd Mq,Vq (66),(v1)
357 16: vmovhps Vdq,Hq,Mq (v1) | vmovlhps Vdq,Hq,Uq (v1) | vmovhpd Vdq,Hq,Mq (66),(v1) | vmovshdup Vx,W…
358 17: vmovhps Mq,Vq (v1) | vmovhpd Mq,Vq (66),(v1)
382 …s Vps,Qpi | cvtpi2pd Vpd,Qpi (66) | vcvtsi2ss Vss,Hss,Ey (F3),(v1) | vcvtsi2sd Vsd,Hsd,Ey (F2),(v1)
384 …tps2pi Ppi,Wps | cvttpd2pi Ppi,Wpd (66) | vcvttss2si Gy,Wss (F3),(v1) | vcvttsd2si Gy,Wsd (F2),(v1)
[all …]
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| /arch/mips/kernel/ |
| D | r4k-bugs64.c | 43 void mult_sh_align_mod(long *v1, long *v2, long *w, in mult_sh_align_mod() argument
113 *v1 = lv1; in mult_sh_align_mod()
120 long v1[8], v2[8], w[8]; in check_mult_sh() local
134 mult_sh_align_mod(&v1[0], &v2[0], &w[0], 32, 0); in check_mult_sh()
135 mult_sh_align_mod(&v1[1], &v2[1], &w[1], 32, 1); in check_mult_sh()
136 mult_sh_align_mod(&v1[2], &v2[2], &w[2], 32, 2); in check_mult_sh()
137 mult_sh_align_mod(&v1[3], &v2[3], &w[3], 32, 3); in check_mult_sh()
138 mult_sh_align_mod(&v1[4], &v2[4], &w[4], 32, 4); in check_mult_sh()
139 mult_sh_align_mod(&v1[5], &v2[5], &w[5], 32, 5); in check_mult_sh()
140 mult_sh_align_mod(&v1[6], &v2[6], &w[6], 32, 6); in check_mult_sh()
[all …]
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| /arch/powerpc/platforms/ps3/ |
| D | repository.c | 54 u64 v1, u64 v2, const char *func, int line) in _dump_node() argument
61 pr_devel("%s:%d: v1: %016llx\n", func, line, v1); in _dump_node()
113 u64 v1; in read_node() local
122 result = lv1_read_repository_node(lpar_id, n1, n2, n3, n4, &v1, in read_node()
132 dump_node(lpar_id, n1, n2, n3, n4, v1, v2); in read_node()
135 *_v1 = v1; in read_node()
139 if (v1 && !_v1) in read_node()
141 __func__, __LINE__, v1); in read_node()
169 u64 v1 = 0; in ps3_repository_read_bus_type() local
175 &v1, NULL); in ps3_repository_read_bus_type()
[all …]
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| /arch/mips/netlogic/common/ |
| D | reset.S | 108 ori v1, v0, 0x3 /* way0 | write_enable | write_active */
109 mtcr v1, t1
111 mfcr v1, t1
112 andi v1, 0x1 /* wait for write_active == 0 */
113 bnez v1, 12b
116 ori v1, v0, 0x7 /* way1 | write_enable | write_active */
117 mtcr v1, t1
119 mfcr v1, t1
120 andi v1, 0x1 /* wait for write_active == 0 */
121 bnez v1, 13b
[all …]
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| /arch/mips/include/asm/ |
| D | stackframe.h | 60 mflhxu v1
61 LONG_S v1, PT_LO(sp)
62 mflhxu v1
63 LONG_S v1, PT_HI(sp)
64 mflhxu v1
65 LONG_S v1, PT_ACX(sp)
67 mfhi v1
77 LONG_S v1, PT_HI(sp)
78 mflo v1
85 LONG_S v1, PT_LO(sp)
[all …]
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| /arch/arm/boot/dts/ |
| D | sun8i-h3-bananapi-m2-plus-v1.2.dts | 6 /dts-v1/;
8 #include "sunxi-bananapi-m2-plus-v1.2.dtsi"
11 model = "Banana Pi BPI-M2-Plus v1.2 H3";
12 compatible = "bananapi,bpi-m2-plus-v1.2", "allwinner,sun8i-h3";
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| /arch/arm64/boot/dts/allwinner/ |
| D | sun50i-h5-bananapi-m2-plus-v1.2.dts | 4 /dts-v1/;
7 #include <arm/sunxi-bananapi-m2-plus-v1.2.dtsi>
10 model = "Banana Pi BPI-M2-Plus v1.2 H5";
11 compatible = "bananapi,bpi-m2-plus-v1.2", "allwinner,sun50i-h5";
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| /arch/powerpc/crypto/ |
| D | crc32-vpmsum_core.S | 161 vxor v1,v1,v1
265 vxor v1,v1,v9
320 vxor v1,v1,v9
351 vxor v1,v1,v9
367 vsldoi v1,v1,zeroes,4
397 vxor v17,v1,v9
426 lvx v1,off16,r3
436 VPMSUMW(v1,v17,v1)
497 1: vxor v0,v0,v1
515 vsldoi v1,v0,v0,8
[all …]
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| /arch/x86/kernel/ |
| D | jailhouse.c | 28 #define SETUP_DATA_V1_LEN (sizeof(setup_data.hdr) + sizeof(setup_data.v1))
66 lapic_timer_period = setup_data.v1.apic_khz * (1000 / HZ); in jailhouse_timer_init()
104 for (cpu = 0; cpu < setup_data.v1.num_cpus; cpu++) { in jailhouse_get_smp_config()
105 generic_processor_info(setup_data.v1.cpu_ids[cpu], in jailhouse_get_smp_config()
111 if (setup_data.v1.standard_ioapic) { in jailhouse_get_smp_config()
142 if (setup_data.v1.pci_mmconfig_base) { in jailhouse_pci_arch_init()
144 setup_data.v1.pci_mmconfig_base); in jailhouse_pci_arch_init()
254 pmtmr_ioport = setup_data.v1.pm_timer_address; in jailhouse_init_platform()
257 precalibrated_tsc_khz = setup_data.v1.tsc_khz; in jailhouse_init_platform()
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| /arch/mips/lib/ |
| D | strncpy_user.S | 34 move v1, a1
38 1: EX(lbue, v0, (v1), .Lfault)
41 1: EX(lbu, v0, (v1), .Lfault)
43 PTR_ADDIU v1, 1
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| D | csum_partial.S | 63 sltu v1, sum, reg; \
64 ADD sum, v1; \
71 sltu v1, sum, reg; \
72 addu sum, v1; \
274 dsll32 v1, sum, 0
275 daddu sum, v1
276 sltu v1, sum, v1
278 addu sum, v1
286 wsbh v1, sum
287 movn sum, v1, t7
[all …]
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