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/arch/s390/crypto/
Dcrc32le-vx.S132 VPERM %v2,%v2,%v2,CONST_PERM_LE2BE
159 VGFMAG %v2,CONST_R2R1,%v2,%v6
175 VGFMAG %v1,CONST_R4R3,%v1,%v2
184 VL %v2,0,,%r3 /* Load next data chunk */
185 VPERM %v2,%v2,%v2,CONST_PERM_LE2BE
186 VGFMAG %v1,CONST_R4R3,%v1,%v2 /* Fold next data chunk */
233 VSRLB %v2,%v1,%v9 /* Store remaining bits in V2 */
235 VGFMAG %v1,CONST_R5,%v1,%v2 /* V1 = (V1 * R5) XOR V2 */
257 VUPLLF %v2,%v1
258 VGFMG %v2,CONST_RU_POLY,%v2
[all …]
Dcrc32be-vx.S124 VGFMAG %v2,CONST_R1R2,%v2,%v6
137 VGFMAG %v1,CONST_R3R4,%v1,%v2
147 VL %v2,0,,%r3 /* Load next data chunk */
148 VGFMAG %v1,CONST_R3R4,%v1,%v2 /* Fold next data chunk */
196 VUPLLF %v2,%v1
197 VGFMG %v2,CONST_RU_POLY,%v2
204 VUPLLF %v2,%v2
205 VGFMAG %v2,CONST_CRC_POLY,%v2,%v1
208 VLGVF %r2,%v2,3
/arch/arm64/lib/
Dxor-neon.c19 register uint64x2_t v0, v1, v2, v3; in xor_arm64_neon_2() local
26 v2 = veorq_u64(vld1q_u64(dp1 + 4), vld1q_u64(dp2 + 4)); in xor_arm64_neon_2()
32 vst1q_u64(dp1 + 4, v2); in xor_arm64_neon_2()
47 register uint64x2_t v0, v1, v2, v3; in xor_arm64_neon_3() local
54 v2 = veorq_u64(vld1q_u64(dp1 + 4), vld1q_u64(dp2 + 4)); in xor_arm64_neon_3()
60 v2 = veorq_u64(v2, vld1q_u64(dp3 + 4)); in xor_arm64_neon_3()
66 vst1q_u64(dp1 + 4, v2); in xor_arm64_neon_3()
83 register uint64x2_t v0, v1, v2, v3; in xor_arm64_neon_4() local
90 v2 = veorq_u64(vld1q_u64(dp1 + 4), vld1q_u64(dp2 + 4)); in xor_arm64_neon_4()
96 v2 = veorq_u64(v2, vld1q_u64(dp3 + 4)); in xor_arm64_neon_4()
[all …]
/arch/powerpc/lib/
Dxor_vmx.c56 DEFINE(v2); in __xor_altivec_2()
61 LOAD(v2); in __xor_altivec_2()
62 XOR(v1, v2); in __xor_altivec_2()
66 v2 += 4; in __xor_altivec_2()
74 DEFINE(v2); in __xor_altivec_3()
80 LOAD(v2); in __xor_altivec_3()
82 XOR(v1, v2); in __xor_altivec_3()
87 v2 += 4; in __xor_altivec_3()
97 DEFINE(v2); in __xor_altivec_4()
104 LOAD(v2); in __xor_altivec_4()
[all …]
/arch/mips/kernel/
Dr4k-bugs64.c43 void mult_sh_align_mod(long *v1, long *v2, long *w, in mult_sh_align_mod() argument
114 *v2 = lv2; in mult_sh_align_mod()
120 long v1[8], v2[8], w[8]; in check_mult_sh() local
134 mult_sh_align_mod(&v1[0], &v2[0], &w[0], 32, 0); in check_mult_sh()
135 mult_sh_align_mod(&v1[1], &v2[1], &w[1], 32, 1); in check_mult_sh()
136 mult_sh_align_mod(&v1[2], &v2[2], &w[2], 32, 2); in check_mult_sh()
137 mult_sh_align_mod(&v1[3], &v2[3], &w[3], 32, 3); in check_mult_sh()
138 mult_sh_align_mod(&v1[4], &v2[4], &w[4], 32, 4); in check_mult_sh()
139 mult_sh_align_mod(&v1[5], &v2[5], &w[5], 32, 5); in check_mult_sh()
140 mult_sh_align_mod(&v1[6], &v2[6], &w[6], 32, 6); in check_mult_sh()
[all …]
/arch/s390/include/asm/
Dvx-insn.h97 .ifc \vxr,%v2
200 .macro RXB rxb v1 v2=0 v3=0 v4=0
205 .if \v2 & 0x10
224 .macro MRXB m v1 v2=0 v3=0 v4=0
226 RXB rxb, \v1, \v2, \v3, \v4
239 .macro MRXBOPC m opc v1 v2=0 v3=0 v4=0
240 MRXB \m, \v1, \v2, \v3, \v4
283 .macro VLR v1, v2
285 VX_NUM v2, \v2
286 .word 0xE700 | ((v1&15) << 4) | (v2&15)
[all …]
/arch/arm64/boot/dts/rockchip/
Drk3399-opp.dtsi8 compatible = "operating-points-v2";
39 compatible = "operating-points-v2";
78 compatible = "operating-points-v2";
108 operating-points-v2 = <&cluster0_opp>;
112 operating-points-v2 = <&cluster0_opp>;
116 operating-points-v2 = <&cluster0_opp>;
120 operating-points-v2 = <&cluster0_opp>;
124 operating-points-v2 = <&cluster1_opp>;
128 operating-points-v2 = <&cluster1_opp>;
132 operating-points-v2 = <&gpu_opp_table>;
Drk3399-op1-opp.dtsi8 compatible = "operating-points-v2";
43 compatible = "operating-points-v2";
86 compatible = "operating-points-v2";
116 operating-points-v2 = <&cluster0_opp>;
120 operating-points-v2 = <&cluster0_opp>;
124 operating-points-v2 = <&cluster0_opp>;
128 operating-points-v2 = <&cluster0_opp>;
132 operating-points-v2 = <&cluster1_opp>;
136 operating-points-v2 = <&cluster1_opp>;
140 operating-points-v2 = <&gpu_opp_table>;
/arch/arm64/boot/dts/exynos/
Dexynos5433-bus.dtsi14 operating-points-v2 = <&bus_g2d_400_opp_table>;
22 operating-points-v2 = <&bus_g2d_266_opp_table>;
30 operating-points-v2 = <&bus_gscl_opp_table>;
38 operating-points-v2 = <&bus_hevc_opp_table>;
46 operating-points-v2 = <&bus_g2d_400_opp_table>;
54 operating-points-v2 = <&bus_g2d_400_opp_table>;
62 operating-points-v2 = <&bus_g2d_400_opp_table>;
70 operating-points-v2 = <&bus_hevc_opp_table>;
78 operating-points-v2 = <&bus_hevc_opp_table>;
86 operating-points-v2 = <&bus_noc2_opp_table>;
[all …]
/arch/arm64/crypto/
Dsm3-ce-core.S96 CPU_LE( rev32 v2.16b, v2.16b )
101 qround a, v0, v1, v2, v3, v4
102 qround a, v1, v2, v3, v4, v0
103 qround a, v2, v3, v4, v0, v1
104 qround a, v3, v4, v0, v1, v2
108 qround b, v4, v0, v1, v2, v3
109 qround b, v0, v1, v2, v3, v4
110 qround b, v1, v2, v3, v4, v0
111 qround b, v2, v3, v4, v0, v1
112 qround b, v3, v4, v0, v1, v2
[all …]
Daes-ce-core.S20 0: mov v2.16b, v1.16b
22 1: aese v0.16b, v2.16b
27 3: ld1 {v2.4s}, [x0], #16
33 aese v0.16b, v2.16b
48 0: mov v2.16b, v1.16b
50 1: aesd v0.16b, v2.16b
55 3: ld1 {v2.4s}, [x0], #16
61 aesd v0.16b, v2.16b
Daes-modes.S26 encrypt_block4x v0, v1, v2, v3, w3, x2, x8, w7
31 decrypt_block4x v0, v1, v2, v3, w3, x2, x8, w7
37 encrypt_block5x v0, v1, v2, v3, v4, w3, x2, x8, w7
42 decrypt_block5x v0, v1, v2, v3, v4, w3, x2, x8, w7
150 eor v2.16b, v2.16b, v1.16b
151 encrypt_block v2, w3, x2, x6, w7
152 eor v3.16b, v3.16b, v2.16b
200 mov v7.16b, v2.16b
207 eor v2.16b, v2.16b, v6.16b
213 mov v6.16b, v2.16b
[all …]
Dchacha-neon-core.S51 add v2.4s, v2.4s, v3.4s
52 eor v4.16b, v1.16b, v2.16b
62 add v2.4s, v2.4s, v3.4s
63 eor v4.16b, v1.16b, v2.16b
70 ext v2.16b, v2.16b, v2.16b, #8
80 add v2.4s, v2.4s, v3.4s
81 eor v4.16b, v1.16b, v2.16b
91 add v2.4s, v2.4s, v3.4s
92 eor v4.16b, v1.16b, v2.16b
99 ext v2.16b, v2.16b, v2.16b, #8
[all …]
Dcrct10dif-ce-core.S277 CPU_LE( rev64 v2.16b, v2.16b )
285 CPU_LE( ext v2.16b, v2.16b, v2.16b, #8 )
309 fold_32_bytes \p, v2, v3
324 fold_16_bytes \p, v2, v6
374 ld1 {v2.16b}, [x4]
375 tbl v1.16b, {v7.16b}, v2.16b
379 eor v2.16b, v2.16b, v3.16b
380 tbl v3.16b, {v7.16b}, v2.16b
383 sshr v2.16b, v2.16b, #7
387 bsl v2.16b, v1.16b, v0.16b
[all …]
/arch/arm64/boot/dts/allwinner/
Dsun50i-a64-cpu-opp.dtsi8 compatible = "operating-points-v2";
62 operating-points-v2 = <&cpu0_opp_table>;
66 operating-points-v2 = <&cpu0_opp_table>;
70 operating-points-v2 = <&cpu0_opp_table>;
74 operating-points-v2 = <&cpu0_opp_table>;
Dsun50i-h5-cpu-opp.dtsi6 compatible = "operating-points-v2";
66 operating-points-v2 = <&cpu_opp_table>;
70 operating-points-v2 = <&cpu_opp_table>;
74 operating-points-v2 = <&cpu_opp_table>;
78 operating-points-v2 = <&cpu_opp_table>;
/arch/arm64/boot/dts/amlogic/
Dmeson-g12b-khadas-vim3.dtsi52 operating-points-v2 = <&cpu_opp_table_0>;
59 operating-points-v2 = <&cpu_opp_table_0>;
66 operating-points-v2 = <&cpub_opp_table_1>;
73 operating-points-v2 = <&cpub_opp_table_1>;
80 operating-points-v2 = <&cpub_opp_table_1>;
87 operating-points-v2 = <&cpub_opp_table_1>;
/arch/arm64/boot/dts/qcom/
Dsdm660.dtsi14 operating-points-v2 = <&gpu_sdm660_opp_table>;
17 compatible = "operating-points-v2";
91 /delete-property/ operating-points-v2;
97 /delete-property/ operating-points-v2;
103 /delete-property/ operating-points-v2;
109 /delete-property/ operating-points-v2;
115 /delete-property/ operating-points-v2;
121 /delete-property/ operating-points-v2;
127 /delete-property/ operating-points-v2;
133 /delete-property/ operating-points-v2;
[all …]
/arch/arm/boot/dts/
Dowl-s500-labrador-base-m.dts10 #include "owl-s500-labrador-v2.dtsi"
13 model = "Caninos Labrador Core v2 on Labrador Base-M v1";
15 "caninos,labrador-v2", "actions,s500";
Dexynos5422-odroid-core.dtsi39 compatible = "operating-points-v2";
65 compatible = "operating-points-v2";
83 compatible = "operating-points-v2";
95 compatible = "operating-points-v2";
110 compatible = "operating-points-v2";
131 compatible = "operating-points-v2";
149 compatible = "operating-points-v2";
158 compatible = "operating-points-v2";
179 compatible = "operating-points-v2";
197 compatible = "operating-points-v2";
[all …]
Dexynos5420-cpus.dtsi64 operating-points-v2 = <&cluster_a15_opp_table>;
76 operating-points-v2 = <&cluster_a15_opp_table>;
88 operating-points-v2 = <&cluster_a15_opp_table>;
100 operating-points-v2 = <&cluster_a15_opp_table>;
112 operating-points-v2 = <&cluster_a7_opp_table>;
124 operating-points-v2 = <&cluster_a7_opp_table>;
136 operating-points-v2 = <&cluster_a7_opp_table>;
148 operating-points-v2 = <&cluster_a7_opp_table>;
Dexynos4210.dtsi222 operating-points-v2 = <&bus_dmc_opp_table>;
230 operating-points-v2 = <&bus_acp_opp_table>;
238 operating-points-v2 = <&bus_peri_opp_table>;
246 operating-points-v2 = <&bus_fsys_opp_table>;
254 operating-points-v2 = <&bus_display_opp_table>;
262 operating-points-v2 = <&bus_leftbus_opp_table>;
270 operating-points-v2 = <&bus_leftbus_opp_table>;
278 operating-points-v2 = <&bus_leftbus_opp_table>;
286 operating-points-v2 = <&bus_leftbus_opp_table>;
291 compatible = "operating-points-v2";
[all …]
Dexynos5422-cpus.dtsi63 operating-points-v2 = <&cluster_a7_opp_table>;
76 operating-points-v2 = <&cluster_a7_opp_table>;
89 operating-points-v2 = <&cluster_a7_opp_table>;
102 operating-points-v2 = <&cluster_a7_opp_table>;
115 operating-points-v2 = <&cluster_a15_opp_table>;
128 operating-points-v2 = <&cluster_a15_opp_table>;
141 operating-points-v2 = <&cluster_a15_opp_table>;
154 operating-points-v2 = <&cluster_a15_opp_table>;
/arch/arm64/boot/dts/broadcom/stingray/
Dstingray-fs4.dtsi56 compatible = "brcm,iproc-sba-v2";
64 compatible = "brcm,iproc-sba-v2";
72 compatible = "brcm,iproc-sba-v2";
80 compatible = "brcm,iproc-sba-v2";
88 compatible = "brcm,iproc-sba-v2";
96 compatible = "brcm,iproc-sba-v2";
104 compatible = "brcm,iproc-sba-v2";
112 compatible = "brcm,iproc-sba-v2";
/arch/powerpc/boot/dts/fsl/
Dqoriq-fman-0.dtsi55 compatible = "fsl,fman-v2-port-oh";
61 compatible = "fsl,fman-v2-port-oh";
67 compatible = "fsl,fman-v2-port-oh";
73 compatible = "fsl,fman-v2-port-oh";
79 compatible = "fsl,fman-v2-port-oh";
86 compatible = "fsl,fman-v2-port-oh";
93 compatible = "fsl,fman-v2-port-oh";

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