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Searched refs:wmask (Results 1 – 13 of 13) sorted by relevance

/arch/x86/platform/intel-quark/
Dimr.c70 u32 wmask; member
95 imr->wmask == IMR_WRITE_ACCESS_ALL && in imr_is_enabled()
127 return iosf_mbi_read(QRK_MBI_UNIT_MM, MBI_REG_READ, reg++, &imr->wmask); in imr_read()
161 ret = iosf_mbi_write(QRK_MBI_UNIT_MM, MBI_REG_WRITE, reg++, imr->wmask); in imr_write()
221 &base, &end, size, imr.rmask, imr.wmask, in imr_dbgfs_state_show()
299 unsigned int rmask, unsigned int wmask) in imr_add_range() argument
327 imr.wmask = wmask; in imr_add_range()
364 reg, &base, &end, raw_size, rmask, wmask); in imr_add_range()
370 imr.wmask = wmask; in imr_add_range()
382 imr.wmask = IMR_WRITE_ACCESS_ALL; in imr_add_range()
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/arch/powerpc/platforms/powernv/
Dsmp.c166 unsigned long srr1, unexpected_mask, wmask; in pnv_cpu_offline_self() local
178 wmask = SRR1_WAKEMASK; in pnv_cpu_offline_self()
180 wmask = SRR1_WAKEMASK_P8; in pnv_cpu_offline_self()
242 if (((srr1 & wmask) == SRR1_WAKEEE) || in pnv_cpu_offline_self()
243 ((srr1 & wmask) == SRR1_WAKEHVI)) { in pnv_cpu_offline_self()
245 } else if ((srr1 & wmask) == SRR1_WAKEHDBELL) { in pnv_cpu_offline_self()
248 } else if ((srr1 & wmask) == SRR1_WAKERESET) { in pnv_cpu_offline_self()
/arch/xtensa/kernel/
Dprocess.c251 int len = childregs->wmask & ~0xf; in copy_thread()
258 childregs->wmask = 1; in copy_thread()
262 int len = childregs->wmask & ~0xf; in copy_thread()
Dsignal.c65 if (regs->wmask == 1) in flush_window_regs_user()
71 base = (XCHAL_NUM_AREGS / 4) - (regs->wmask >> 4); in flush_window_regs_user()
75 if ((regs->wmask & 2) == 0) in flush_window_regs_user()
116 regs->wmask = 1; in flush_window_regs_user()
190 regs->wmask = 1; in restore_sigcontext()
Dtraps.c465 int i, wmask; in show_regs() local
469 wmask = regs->wmask & ~1; in show_regs()
483 regs->windowbase, regs->windowstart, regs->wmask, in show_regs()
Dptrace.c99 u32 rotws, wmask; in gpr_set() local
105 wmask = ((rotws ? WSBITS + 1 - ffs(rotws) : 0) << 4) | in gpr_set()
109 regs->wmask = wmask; in gpr_set()
Dasm-offsets.c38 DEFINE(PT_WMASK, offsetof (struct pt_regs, wmask)); in main()
/arch/alpha/kernel/
Dcore_t2.c88 unsigned long wmask; member
392 t2_saved_config.window[0].wmask = *(vulp)T2_WMASK1; in t2_save_configuration()
395 t2_saved_config.window[1].wmask = *(vulp)T2_WMASK2; in t2_save_configuration()
489 *(vulp)T2_WMASK1 = t2_saved_config.window[0].wmask; in t2_kill_arch()
492 *(vulp)T2_WMASK2 = t2_saved_config.window[1].wmask; in t2_kill_arch()
Dcore_wildfire.c122 pci->pci_window[0].wmask.csr = (hose->sg_isa->size - 1) & 0xfff00000; in wildfire_init_hose()
126 pci->pci_window[1].wmask.csr = (0x40000000 -1) & 0xfff00000; in wildfire_init_hose()
130 pci->pci_window[2].wmask.csr = (0x40000000 -1) & 0xfff00000; in wildfire_init_hose()
134 pci->pci_window[3].wmask.csr = (hose->sg_pci->size - 1) & 0xfff00000; in wildfire_init_hose()
468 pci->pci_window[i].wmask.csr, in wildfire_dump_pci_regs()
/arch/x86/include/asm/
Dimr.h52 unsigned int rmask, unsigned int wmask);
/arch/xtensa/include/asm/
Dptrace.h59 unsigned long wmask; /* 28 */ member
Dprocessor.h204 (regs)->wmask = 1; \
/arch/alpha/include/asm/
Dcore_wildfire.h206 wildfire_64 wmask; member