| /arch/x86/crypto/ |
| D | serpent-avx2-asm_64.S | 51 #define S0_1(x0, x1, x2, x3, x4) \ argument
54 vpxor x2, x3, x4; \
59 vpxor x0, x2, x2;
60 #define S0_2(x0, x1, x2, x3, x4) \ argument
63 vpxor x2, x0, x0; \
64 vpand x1, x2, x2; \
65 vpxor x2, x3, x3; \
67 vpxor x4, x2, x2; \
68 vpxor x2, x1, x1;
70 #define S1_1(x0, x1, x2, x3, x4) \ argument
[all …]
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| D | serpent-avx-x86_64-asm_64.S | 51 #define S0_1(x0, x1, x2, x3, x4) \ argument
54 vpxor x2, x3, x4; \
59 vpxor x0, x2, x2;
60 #define S0_2(x0, x1, x2, x3, x4) \ argument
63 vpxor x2, x0, x0; \
64 vpand x1, x2, x2; \
65 vpxor x2, x3, x3; \
67 vpxor x4, x2, x2; \
68 vpxor x2, x1, x1;
70 #define S1_1(x0, x1, x2, x3, x4) \ argument
[all …]
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| D | serpent-sse2-x86_64-asm_64.S | 41 #define S0_1(x0, x1, x2, x3, x4) \ argument
45 pxor x2, x4; \
50 pxor x0, x2;
51 #define S0_2(x0, x1, x2, x3, x4) \ argument
54 pxor x2, x0; \
55 pand x1, x2; \
56 pxor x2, x3; \
58 pxor x4, x2; \
59 pxor x2, x1;
61 #define S1_1(x0, x1, x2, x3, x4) \ argument
[all …]
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| D | serpent-sse2-i586-asm_32.S | 42 #define K(x0, x1, x2, x3, x4, i) \ argument
48 pxor RT1, x2; \
52 #define LK(x0, x1, x2, x3, x4, i) \ argument
58 movdqa x2, x4; \
59 pslld $3, x2; \
61 por x4, x2; \
62 pxor x2, x1; \
69 pxor x2, x3; \
79 pxor x3, x2; \
80 pxor x4, x2; \
[all …]
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| D | glue_helper-asm-avx.S | 8 #define load_8way(src, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
11 vmovdqu (2*16)(src), x2; \
18 #define store_8way(dst, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
21 vmovdqu x2, (2*16)(dst); \
28 #define store_cbc_8way(src, dst, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
30 vpxor (1*16)(src), x2, x2; \
36 store_8way(dst, x0, x1, x2, x3, x4, x5, x6, x7);
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| D | glue_helper-asm-avx2.S | 8 #define load_16way(src, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
11 vmovdqu (2*32)(src), x2; \
18 #define store_16way(dst, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
21 vmovdqu x2, (2*32)(dst); \
28 #define store_cbc_16way(src, dst, x0, x1, x2, x3, x4, x5, x6, x7, t0) \ argument
33 vpxor (1*32+16)(src), x2, x2; \
39 store_16way(dst, x0, x1, x2, x3, x4, x5, x6, x7);
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| /arch/arm64/lib/ |
| D | tishift.S | 11 cbz x2, 1f
13 sub x3, x3, x2
16 lsl x1, x1, x2
18 lsl x2, x0, x2
20 mov x0, x2
25 mov x2, #0
27 mov x0, x2
33 cbz x2, 1f
35 sub x3, x3, x2
38 lsr x0, x0, x2
[all …]
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| D | mte.S | 31 multitag_transfer_size x1, x2
50 mov x2, #4
51 lsl x1, x2, x1
71 mov x2, x0
75 stgm x4, [x2]
76 add x2, x2, x5
78 tst x2, #(PAGE_SIZE - 1)
94 cbz x2, 2f
100 subs x2, x2, #1
119 cbz x2, 2f
[all …]
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| D | crc32.S | 15 cmp x2, #16
18 and x7, x2, #0x1f
19 and x2, x2, #~0x1f
53 cbz x2, 0f
56 sub x2, x2, #32
66 cbnz x2, 32b
69 8: tbz x2, #3, 4f
73 4: tbz x2, #2, 2f
77 2: tbz x2, #1, 1f
81 1: tbz x2, #0, 0f
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| D | clear_user.S | 24 add x2, x0, x1
32 USER(9f, sttr xzr, [x2, #-8])
38 USER(8f, sttr wzr, [x2, #-4])
45 USER(7f, sttrb wzr, [x2, #-1])
53 7: sub x0, x2, #5 // Adjust for faulting on the final byte...
55 9: sub x0, x2, x0
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| /arch/powerpc/boot/dts/fsl/ |
| D | mpc8568mds.dts | 29 0x2 0x0 0xf0000000 0x04000000
97 reg = <0x2>;
128 0x4 0xa 0x1 0x0 0x2 0x0 /* TxD0 */
129 0x4 0x9 0x1 0x0 0x2 0x0 /* TxD1 */
130 0x4 0x8 0x1 0x0 0x2 0x0 /* TxD2 */
131 0x4 0x7 0x1 0x0 0x2 0x0 /* TxD3 */
132 0x4 0x17 0x1 0x0 0x2 0x0 /* TxD4 */
133 0x4 0x16 0x1 0x0 0x2 0x0 /* TxD5 */
134 0x4 0x15 0x1 0x0 0x2 0x0 /* TxD6 */
135 0x4 0x14 0x1 0x0 0x2 0x0 /* TxD7 */
[all …]
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| D | mpc8569mds.dts | 34 0x2 0x0 0x0 0xf0000000 0x04000000
143 0x2 0x1f 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */
144 0x2 0x1e 0x3 0x0 0x2 0x0 /* QE_MUX_MDIO */
145 0x2 0x0b 0x2 0x0 0x1 0x0 /* CLK12*/
148 0x0 0x2 0x1 0x0 0x1 0x0 /* ENET1_TXD2_SER1_TXD2 */
149 0x0 0x3 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */
150 0x0 0x6 0x2 0x0 0x3 0x0 /* ENET1_RXD0_SER1_RXD0 */
151 0x0 0x7 0x2 0x0 0x1 0x0 /* ENET1_RXD1_SER1_RXD1 */
152 0x0 0x8 0x2 0x0 0x2 0x0 /* ENET1_RXD2_SER1_RXD2 */
153 0x0 0x9 0x2 0x0 0x2 0x0 /* ENET1_RXD3_SER1_RXD3 */
[all …]
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| D | p1025twr.dtsi | 98 reg = <0x2 0x0000 0x0004>;
112 reg = <0x2>;
180 0x0 0x17 0x2 0x0 0x2 0x0 /* CLK12 */
181 0x0 0x18 0x2 0x0 0x1 0x0 /* CLK9 */
182 0x0 0x7 0x1 0x0 0x2 0x0 /* ENET1_TXD0_SER1_TXD0 */
183 0x0 0x9 0x1 0x0 0x2 0x0 /* ENET1_TXD1_SER1_TXD1 */
184 0x0 0xb 0x1 0x0 0x2 0x0 /* ENET1_TXD2_SER1_TXD2 */
185 0x0 0xc 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */
186 0x0 0x6 0x2 0x0 0x2 0x0 /* ENET1_RXD0_SER1_RXD0 */
187 0x0 0xa 0x2 0x0 0x2 0x0 /* ENET1_RXD1_SER1_RXD1 */
[all …]
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| D | p1025rdb.dtsi | 253 0x0 0x17 0x2 0x0 0x2 0x0 /* CLK12 */
254 0x0 0x18 0x2 0x0 0x1 0x0 /* CLK9 */
255 0x0 0x7 0x1 0x0 0x2 0x0 /* ENET1_TXD0_SER1_TXD0 */
256 0x0 0x9 0x1 0x0 0x2 0x0 /* ENET1_TXD1_SER1_TXD1 */
257 0x0 0xb 0x1 0x0 0x2 0x0 /* ENET1_TXD2_SER1_TXD2 */
258 0x0 0xc 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */
259 0x0 0x6 0x2 0x0 0x2 0x0 /* ENET1_RXD0_SER1_RXD0 */
260 0x0 0xa 0x2 0x0 0x2 0x0 /* ENET1_RXD1_SER1_RXD1 */
261 0x0 0xe 0x2 0x0 0x2 0x0 /* ENET1_RXD2_SER1_RXD2 */
262 0x0 0xf 0x2 0x0 0x2 0x0 /* ENET1_RXD3_SER1_RXD3 */
[all …]
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| D | p1021mds.dts | 28 0x2 0x0 0x0 0xf8010000 0x00020000
206 0x0 0x17 0x2 0x0 0x2 0x0 /* CLK12 */
207 0x0 0x18 0x2 0x0 0x1 0x0 /* CLK9 */
208 0x0 0x7 0x1 0x0 0x2 0x0 /* ENET1_TXD0_SER1_TXD0 */
209 0x0 0x9 0x1 0x0 0x2 0x0 /* ENET1_TXD1_SER1_TXD1 */
210 0x0 0xb 0x1 0x0 0x2 0x0 /* ENET1_TXD2_SER1_TXD2 */
211 0x0 0xc 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */
212 0x0 0x6 0x2 0x0 0x2 0x0 /* ENET1_RXD0_SER1_RXD0 */
213 0x0 0xa 0x2 0x0 0x2 0x0 /* ENET1_RXD1_SER1_RXD1 */
214 0x0 0xe 0x2 0x0 0x2 0x0 /* ENET1_RXD2_SER1_RXD2 */
[all …]
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| D | p2020ds.dtsi | 83 reg = <0x2 0x0 0x40000>;
151 reg = <0x2>;
220 0x8800 0x0 0x0 0x1 &i8259 0x9 0x2
221 0x8800 0x0 0x0 0x2 &i8259 0xa 0x2
224 0x8900 0x0 0x0 0x1 &i8259 0x9 0x2
225 0x8900 0x0 0x0 0x2 &i8259 0xa 0x2
228 0x8a00 0x0 0x0 0x1 &i8259 0x9 0x2
229 0x8a00 0x0 0x0 0x2 &i8259 0xa 0x2
232 0x8b00 0x0 0x0 0x1 &i8259 0x9 0x2
233 0x8b00 0x0 0x0 0x2 &i8259 0xa 0x2
[all …]
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| D | mpc8572ds.dtsi | 94 reg = <0x2 0x0 0x40000>;
165 reg = <0x2>;
250 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
251 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
256 0x8900 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
257 0x8900 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
262 0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
263 0x8a00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
268 0x8b00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
269 0x8b00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
[all …]
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| D | mpc8548cds.dtsi | 119 reg = <0x2>;
173 0x2000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
174 0x2000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
179 0x2800 0x0 0x0 0x2 &mpic 0x2 0x1 0 0
184 0x3000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
185 0x3000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
191 0x4000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
192 0x4000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
197 0x6000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
198 0x6000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
[all …]
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| D | mpc8540ads.dts | 273 0x1000 0x0 0x0 0x2 &mpic 0x2 0x1
279 0x1800 0x0 0x0 0x2 &mpic 0x1 0x1
280 0x1800 0x0 0x0 0x3 &mpic 0x2 0x1
285 0x2000 0x0 0x0 0x2 &mpic 0x4 0x1
287 0x2000 0x0 0x0 0x4 &mpic 0x2 0x1
290 0x2800 0x0 0x0 0x1 &mpic 0x2 0x1
291 0x2800 0x0 0x0 0x2 &mpic 0x3 0x1
297 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
303 0x6800 0x0 0x0 0x2 &mpic 0x1 0x1
304 0x6800 0x0 0x0 0x3 &mpic 0x2 0x1
[all …]
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| /arch/arm64/kvm/hyp/ |
| D | entry.S | 29 adr_this_cpu x1, kvm_hyp_ctxt, x2
35 save_sp_el0 x1, x2
51 set_loaded_vcpu x0, x1, x2
56 mte_switch_to_guest x29, x1, x2
63 ptrauth_switch_to_guest x29, x0, x1, x2
70 ldp x2, x3, [x29, #CPU_XREG_OFFSET(2)]
119 stp x2, x3, [x1, #CPU_XREG_OFFSET(2)]
122 ldp x2, x3, [sp], #16 // x0, x1
125 stp x2, x3, [x1, #CPU_XREG_OFFSET(0)]
138 save_sp_el0 x1, x2
[all …]
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| /arch/arm64/kernel/ |
| D | relocate_kernel.S | 30 mov x18, x2 /* x18 = dtb address */
46 mov x2, x13
47 add x20, x2, #PAGE_SIZE
49 bic x2, x2, x1
50 2: dc ivac, x2
51 add x2, x2, x15
52 cmp x2, x20
56 copy_page x13, x12, x1, x2, x3, x4, x5, x6, x7, x8
78 mov x2, xzr
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| D | entry-ftrace.S | 42 stp x2, x3, [sp, #S_X2]
98 ldr_l x2, function_trace_op // op
118 ldp x2, x3, [sp, #S_X2]
139 ldr x2, [sp, #PT_REGS_SIZE] // parent fp (callsite's FP)
231 ldr_l x2, ftrace_trace_function
233 cmp x0, x2 // if (ftrace_trace_function
238 blr x2 // (*ftrace_trace_function)(pc, lr);
242 ldr_l x2, ftrace_graph_return
243 cmp x0, x2 // if ((ftrace_graph_return
246 ldr_l x2, ftrace_graph_entry // || (ftrace_graph_entry
[all …]
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| /arch/arm64/mm/ |
| D | cache.S | 33 mov x2, x0
35 dcache_by_line_op cvau, ish, x2, x3, x4, x5, \fixup
41 invalidate_icache_by_line x0, x1, x2, x3, \fixup
71 uaccess_ttbr0_enable x2, x3, x4
76 uaccess_ttbr0_disable x1, x2
97 invalidate_icache_by_line x0, x1, x2, x3
111 dcache_by_line_op civac, sy, x0, x1, x2, x3
129 dcache_by_line_op cvau, ish, x0, x1, x2, x3
152 dcache_line_size x2, x3
153 sub x3, x2, #1
[all …]
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| /arch/sparc/include/asm/ |
| D | sfp-machine_32.h | 78 #define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ argument
85 : "%rJ" ((USItype)(x2)), \
93 #define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ argument
100 : "%rJ" ((USItype)(x2)), \
108 #define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ argument
122 "%rJ" ((USItype)(x2)), \
133 #define __FP_FRAC_SUB_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ argument
147 "%rJ" ((USItype)(x2)), \
158 #define __FP_FRAC_DEC_3(x2,x1,x0,y2,y1,y0) __FP_FRAC_SUB_3(x2,x1,x0,x2,x1,x0,y2,y1,y0) argument
160 #define __FP_FRAC_DEC_4(x3,x2,x1,x0,y3,y2,y1,y0) __FP_FRAC_SUB_4(x3,x2,x1,x0,x3,x2,x1,x0,y3,y2,y1,y… argument
[all …]
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| /arch/x86/math-emu/ |
| D | poly.h | 42 asmlinkage void div_Xsig(Xsig *x1, const Xsig *x2, const Xsig *dest);
74 static inline void add_Xsig_Xsig(Xsig *dest, const Xsig *x2) in add_Xsig_Xsig() argument
80 (*dest):"g"(dest), "g"(x2) in add_Xsig_Xsig()
88 static inline void add_two_Xsig(Xsig *dest, const Xsig *x2, long int *exp) in add_two_Xsig() argument
99 :"g"(dest), "g"(x2), "g"(exp) in add_two_Xsig()
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