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/arch/x86/crypto/
Dsha256-avx2-asm.S111 y1 = %r14d define
158 rorx $11, e, y1 # y1 = e >> 11 # S1B
166 xor y1, y0 # y0 = (e>>25) ^ (e>>11) # S1
168 vpaddd X0, XTMP0, XTMP0 # XTMP0 = W[-7] + W[-16]# y1 = (e >> 6)# S1
169 rorx $6, e, y1 # y1 = (e >> 6) # S1
172 xor y1, y0 # y0 = (e>>25) ^ (e>>11) ^ (e>>6) # S1
173 rorx $22, a, y1 # y1 = a >> 22 # S0A
178 xor T1, y1 # y1 = (a>>22) ^ (a>>13) # S0
183 xor T1, y1 # y1 = (a>>22) ^ (a>>13) ^ (a>>2) # S0
190 add y1, h # h = k + w + h + S0 # --
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Dsha512-avx2-asm.S96 y1 = %r14 define
183 rorx $18, e, y1 # y1 = e >> 18 # S1B
189 xor y1, y0 # y0 = (e>>41) ^ (e>>18) # S1
191 rorx $14, e, y1 # y1 = (e >> 14) # S1
194 xor y1, y0 # y0 = (e>>41) ^ (e>>18) ^ (e>>14) # S1
195 rorx $39, a, y1 # y1 = a >> 39 # S0A
199 xor T1, y1 # y1 = (a>>39) ^ (a>>34) # S0
203 xor T1, y1 # y1 = (a>>39) ^ (a>>34) ^ (a>>28) # S0
209 add y1, h # h = k + w + h + S0 # --
245 rorx $18, e, y1 # y1 = e >> 18 # S1B
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Dsha256-avx-asm.S114 y1 = %r14d define
159 mov a, y1 # y1 = a
161 MY_ROR (22-13), y1 # y1 = a >> (22-13)
165 xor a, y1 # y1 = a ^ (a >> (22-13)
170 MY_ROR (13-2), y1 # y1 = (a >> (13-2)) ^ (a >> (22-2))
173 xor a, y1 # y1 = a ^ (a >> (13-2)) ^ (a >> (22-2))
176 MY_ROR 2, y1 # y1 = S0 = (a>>2) ^ (a>>13) ^ (a>>22)
188 add y1, h # h = h + S1 + CH + k + w + S0
194 mov a, y1 # y1 = a
198 MY_ROR (22-13), y1 # y1 = a >> (22-13)
[all …]
Dsha256-ssse3-asm.S107 y1 = %r14d define
153 mov a, y1 # y1 = a
155 ror $(22-13), y1 # y1 = a >> (22-13)
160 xor a, y1 # y1 = a ^ (a >> (22-13)
165 ror $(13-2), y1 # y1 = (a >> (13-2)) ^ (a >> (22-2))
168 xor a, y1 # y1 = a ^ (a >> (13-2)) ^ (a >> (22-2))
172 ror $2, y1 # y1 = S0 = (a>>2) ^ (a>>13) ^ (a>>22)
185 add y1, h # h = h + S1 + CH + k + w + S0
193 mov a, y1 # y1 = a
198 ror $(22-13), y1 # y1 = a >> (22-13)
[all …]
Dcamellia-aesni-avx-asm_64.S212 #define two_roundsm16(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \ argument
244 #define enc_rounds16(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \ argument
246 two_roundsm16(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \
248 two_roundsm16(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \
250 two_roundsm16(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \
253 #define dec_rounds16(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \ argument
255 two_roundsm16(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \
257 two_roundsm16(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \
259 two_roundsm16(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \
482 #define inpack16_pre(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \ argument
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Dcamellia-aesni-avx2-asm_64.S246 #define two_roundsm32(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \ argument
278 #define enc_rounds32(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \ argument
280 two_roundsm32(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \
282 two_roundsm32(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \
284 two_roundsm32(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \
287 #define dec_rounds32(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \ argument
289 two_roundsm32(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \
291 two_roundsm32(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \
293 two_roundsm32(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \
516 #define inpack32_pre(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \ argument
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Dtwofish-avx-x86_64-asm_64.S115 #define round_head_2(a, b, x1, y1, x2, y2) \ argument
125 G(RGI3, RGI4, y1, s1, s2, s3, s0); \
128 vmovq RGS2, y1; \
129 vpinsrq $1, RGS3, y1, y1; \
/arch/sparc/include/asm/
Dsfp-machine_32.h78 #define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ argument
88 "rI" ((USItype)(y1)), \
93 #define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ argument
103 "rI" ((USItype)(y1)), \
108 #define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ argument
125 "rI" ((USItype)(y1)), \
133 #define __FP_FRAC_SUB_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ argument
150 "rI" ((USItype)(y1)), \
158 #define __FP_FRAC_DEC_3(x2,x1,x0,y2,y1,y0) __FP_FRAC_SUB_3(x2,x1,x0,x2,x1,x0,y2,y1,y0) argument
160 #define __FP_FRAC_DEC_4(x3,x2,x1,x0,y3,y2,y1,y0) __FP_FRAC_SUB_4(x3,x2,x1,x0,x3,x2,x1,x0,y3,y2,y1,y… argument
/arch/sh/include/uapi/asm/
Dptrace_32.h70 unsigned long y1; member
/arch/arm/crypto/
Daes-neonbs-core.S141 .macro mul_gf4, x0, x1, y0, y1, t0, t1
142 veor \t0, \y0, \y1
146 vand \x0, \x0, \y1
151 .macro mul_gf4_n_gf4, x0, x1, y0, y1, t0, x2, x3, y2, y3, t1
152 veor \t0, \y0, \y1
160 vand \x0, \x0, \y1
169 y0, y1, y2, y3, t0, t1, t2, t3
172 mul_gf4 \x0, \x1, \y0, \y1, \t2, \t3
174 veor \y1, \y1, \y3
175 mul_gf4_n_gf4 \t0, \t1, \y0, \y1, \t3, \x2, \x3, \y2, \y3, \t2
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/arch/arm64/crypto/
Daes-neonbs-core.S86 .macro mul_gf4, x0, x1, y0, y1, t0, t1
87 eor \t0, \y0, \y1
91 and \x0, \x0, \y1
96 .macro mul_gf4_n_gf4, x0, x1, y0, y1, t0, x2, x3, y2, y3, t1
97 eor \t0, \y0, \y1
105 and \x0, \x0, \y1
114 y0, y1, y2, y3, t0, t1, t2, t3
117 mul_gf4 \x0, \x1, \y0, \y1, \t2, \t3
119 eor \y1, \y1, \y3
120 mul_gf4_n_gf4 \t0, \t1, \y0, \y1, \t3, \x2, \x3, \y2, \y3, \t2
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/arch/arm64/boot/dts/rockchip/
Dpx30-evb.dts406 "1", /* y1 */