Home
last modified time | relevance | path

Searched refs:ACK (Results 1 – 18 of 18) sorted by relevance

/drivers/scsi/
D53c700.scr181 CLEAR ACK
195 CLEAR ACK
199 CLEAR ACK
208 CLEAR ACK
212 CLEAR ACK
216 CLEAR ACK
220 CLEAR ACK
224 CLEAR ACK
232 CLEAR ACK
240 CLEAR ACK
[all …]
D53c700_d.h_shipped238 CLEAR ACK
267 CLEAR ACK
280 CLEAR ACK
313 CLEAR ACK
326 CLEAR ACK
339 CLEAR ACK
352 CLEAR ACK
365 CLEAR ACK
382 CLEAR ACK
399 CLEAR ACK
[all …]
/drivers/usb/gadget/udc/
Dgoku_udc.c1528 #define ACK(irqbit) { \ macro
1579 ACK(INT_SUSPEND); in goku_irq()
1616 ACK(INT_USBRESET); in goku_irq()
1627 ACK(INT_SETUP); in goku_irq()
1632 ACK(INT_STATUSNAK|INT_ENDPOINT0); in goku_irq()
1642 ACK(INT_ENDPOINT0); in goku_irq()
1650 ACK(INT_MSTRDEND); in goku_irq()
1656 ACK(INT_MSTWREND); in goku_irq()
1662 ACK(INT_MSTWRTMOUT); in goku_irq()
1696 #undef ACK
/drivers/net/wireless/ath/ath9k/
DKconfig118 bool "Atheros ath9k ACK timeout estimation algorithm"
122 This option enables ath9k dynamic ACK timeout estimation algorithm
123 based on ACK frame RX timestamp, TX frame timestamp and frame
/drivers/usb/serial/
Dgarmin_gps.c98 #define ACK 0x06 macro
347 *ptr++ = ACK; in gsp_send_ack()
348 cksum += ACK; in gsp_send_ack()
514 if (data == ACK) { in gsp_receive()
515 ack_or_nak_seen = ACK; in gsp_receive()
/drivers/media/pci/bt8xx/
Ddst_common.h83 #define ACK 0xff macro
Ddst.c1067 if (reply != ACK) { in dst_get_device_id()
1217 if (reply != ACK) { in dst_command()
1389 if (reply != ACK) { in dst_write_tuna()
/drivers/scsi/aic7xxx/
Daic7xxx.seq1120 * it makes sense that the DMA circuitry doesn't ACK when
1445 * Wait for our ACK to go-away on it's own
1598 mov NONE,SCSIDATL; /*dummy read from latch to ACK*/
1732 mov NONE,SCSIDATL; /*dummy read from latch to ACK*/
1762 mov NONE,SCSIDATL; /*dummy read from latch to ACK*/
1768 mov NONE,SCSIDATL; /*dummy read from latch to ACK*/
1884 mov NONE,SCSIDATL; /* ACK Identify MSG */
1961 * According to Adaptec's documentation, an ACK is not sent on input from
1967 * we send our ACK.
1977 mov NONE,SCSIDATL; /*dummy read from latch to ACK*/
[all …]
Daic79xx.seq1054 mov NONE, SCSIDAT; /* ACK Byte */
1078 mov NONE,SCSIDAT; /*dummy read from latch to ACK*/
1117 mov NONE, SCSIDAT; /* ACK Identify MSG */
1352 mov NONE,SCSIDAT; /*dummy read from latch to ACK*/
1399 * an async phase due to our asserted ACK. Each
1421 * An ACK is not sent on input from the target until SCSIDATL is read from.
1426 * data byte on the bus until we send our ACK.
1433 mov NONE,SCSIDAT; /*dummy read from latch to ACK*/
1450 mov NONE,SCSIDAT ret; /*dummy read from latch to ACK*/
Daic79xx.reg3228 * DSP ACK Control
/drivers/gpu/drm/amd/display/dc/
Ddc_dp_types.h543 uint8_t ACK :1; member
/drivers/gpu/drm/amd/display/dc/core/
Ddc_link_dp.c3195 test_response.bits.ACK = 1; in dc_link_dp_handle_automated_test()
3203 test_response.bits.ACK = 0; in dc_link_dp_handle_automated_test()
3207 test_response.bits.ACK = 1; in dc_link_dp_handle_automated_test()
3212 test_response.bits.ACK = 1; in dc_link_dp_handle_automated_test()
3217 test_response.bits.ACK = 1; in dc_link_dp_handle_automated_test()
3221 if (test_response.bits.ACK) in dc_link_dp_handle_automated_test()
/drivers/infiniband/hw/hfi1/
Dtrace.c371 case OP(TID_RDMA, ACK): in parse_everbs_hdrs()
Ddriver.c481 opcode == TID_OP(ACK); in hfi1_process_ecn_slowpath()
Drc.c1724 opcode != TID_OP(ACK) && opcode != TID_OP(RESYNC)) in hfi1_rc_send_complete()
Dtid_rdma.c5316 hfi1_make_ruc_header(qp, ohdr, (TID_OP(ACK) << 24), bth1, bth2, middle, in make_tid_rdma_ack()
/drivers/platform/surface/aggregator/
Dssh_packet_layer.c1662 ssh_packet_init(packet, 0, SSH_PACKET_PRIORITY(ACK, 0), in ssh_ptl_send_ack()
/drivers/net/wan/
Dfarsync.c367 #define ACK 1 /* Positive acknowledgement to PC driver */ macro