Searched refs:APMU_DFC (Results 1 – 4 of 4) sorted by relevance
| /drivers/clk/mmp/ |
| D | clk-of-pxa168.c | 48 #define APMU_DFC 0x60 macro
202 {PXA168_CLK_DFC, "dfc_clk", "pll1_4", CLK_SET_RATE_PARENT, APMU_DFC, 0x19b, 0x19b, 0x0, 0, NULL},
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| D | clk-pxa910.c | 43 #define APMU_DFC 0x60 macro
259 apmu_base + APMU_DFC, 0x19b, &clk_lock); in pxa910_clk_init()
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| D | clk-of-pxa910.c | 47 #define APMU_DFC 0x60 macro
208 {PXA910_CLK_DFC, "dfc_clk", "pll1_4", CLK_SET_RATE_PARENT, APMU_DFC, 0x19b, 0x19b, 0x0, 0, NULL},
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| D | clk-pxa168.c | 45 #define APMU_DFC 0x60 macro
283 clk = mmp_clk_register_apmu("dfc", "pll1_4", apmu_base + APMU_DFC, in pxa168_clk_init()
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