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Searched refs:A_PL_ENABLE (Results 1 – 7 of 7) sorted by relevance

/drivers/net/ethernet/chelsio/cxgb/
Dtp.c73 u32 tp_intr = readl(tp->adapter->regs + A_PL_ENABLE); in t1_tp_intr_enable()
81 tp->adapter->regs + A_PL_ENABLE); in t1_tp_intr_enable()
88 tp->adapter->regs + A_PL_ENABLE); in t1_tp_intr_enable()
94 u32 tp_intr = readl(tp->adapter->regs + A_PL_ENABLE); in t1_tp_intr_disable()
101 tp->adapter->regs + A_PL_ENABLE); in t1_tp_intr_disable()
107 tp->adapter->regs + A_PL_ENABLE); in t1_tp_intr_disable()
Despi.c119 u32 enable, pl_intr = readl(espi->adapter->regs + A_PL_ENABLE); in t1_espi_intr_enable()
130 writel(pl_intr | F_PL_INTR_ESPI, espi->adapter->regs + A_PL_ENABLE); in t1_espi_intr_enable()
142 u32 pl_intr = readl(espi->adapter->regs + A_PL_ENABLE); in t1_espi_intr_disable()
145 writel(pl_intr & ~F_PL_INTR_ESPI, espi->adapter->regs + A_PL_ENABLE); in t1_espi_intr_disable()
Dsubr.c788 u32 pl_intr = readl(adapter->regs + A_PL_ENABLE); in t1_interrupts_enable()
796 writel(pl_intr, adapter->regs + A_PL_ENABLE); in t1_interrupts_enable()
818 writel(0, adapter->regs + A_PL_ENABLE); in t1_interrupts_disable()
885 adapter->regs + A_PL_ENABLE); in asic_slow_intr()
Dpm3393.c154 pl_intr = readl(cmac->adapter->regs + A_PL_ENABLE); in pm3393_interrupt_enable()
156 writel(pl_intr, cmac->adapter->regs + A_PL_ENABLE); in pm3393_interrupt_enable()
Dsge.c911 u32 val = readl(sge->adapter->regs + A_PL_ENABLE); in t1_sge_intr_disable()
913 writel(val & ~SGE_PL_INTR_MASK, sge->adapter->regs + A_PL_ENABLE); in t1_sge_intr_disable()
923 u32 val = readl(sge->adapter->regs + A_PL_ENABLE); in t1_sge_intr_enable()
928 writel(val | SGE_PL_INTR_MASK, sge->adapter->regs + A_PL_ENABLE); in t1_sge_intr_enable()
1655 adapter->regs + A_PL_ENABLE); in t1_interrupt_thread()
Dcxgb2.c563 reg_block_dump(ap, buf, A_PL_ENABLE, A_PL_CAUSE); in get_regs()
Dregs.h1744 #define A_PL_ENABLE 0xa00 macro