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Searched refs:BIT17 (Results 1 – 15 of 15) sorted by relevance

/drivers/staging/rtl8723bs/include/
Dhal_com_reg.h625 #define RRSR_MCS5 BIT17
759 #define IMR_TIMEOUT2 BIT17 /* Timeout interrupt 2 */
807 #define PHIMR_BCNDOK1 BIT17
833 #define PHIMR_BCNDOK5 BIT17
858 #define UHIMR_BCNDOK1 BIT17
884 #define UHIMR_BCNDOK5 BIT17
942 #define IMR_BCNDOK4_88E BIT17 /* Beacon Queue DMA OK Interrupt 4 */
1006 #define RCR_BM_DATA_EN BIT17 /* Broadcast data packet interrupt enable. */
1548 #define SDIO_HIMR_C2HCMD_MSK BIT17
1574 #define SDIO_HISR_C2HCMD BIT17
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Drtl8723b_spec.h227 #define IMR_BCNDOK4_8723B BIT17 /* Beacon Queue DMA OK Interrupt 4 */
Dosdep_service.h34 #define BIT17 0x00020000 macro
Drtw_mlme_ext.h62 #define DYNAMIC_MAC_EARLY_MODE BIT17/* ODM_MAC_EARLY_MODE */
/drivers/net/wireless/realtek/rtlwifi/btcoexist/
Dhalbt_precomp.h48 #define BIT17 0x00020000 macro
/drivers/staging/rtl8192e/
Drtl819x_Qos.h27 #define BIT17 0x00020000 macro
/drivers/scsi/
Ddc395x.h59 #define BIT17 0x00020000 macro
/drivers/staging/rtl8723bs/hal/
DHal8723BReg.h416 #define IMR_BCNDOK4_8723B BIT17 /* Beacon Queue DMA OK Interrupt 4 */
Dodm.c723 PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_T_METER_NEW, (BIT17 | BIT16), 0x03); in ODM_TXPowerTrackingCheck()
Dodm.h384 ODM_MAC_EARLY_MODE = BIT17,
Dhal_com.c1208 PHY_SetRFReg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, BIT18|BIT17|BIT16|BIT15, target); in rtw_bb_rf_gain_offset()
/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_hw.h378 #define RRSR_MCS5 BIT17
/drivers/net/wireless/realtek/rtlwifi/rtl8192de/
Dreg.h375 #define RRSR_MCS5 BIT17
/drivers/scsi/lpfc/
Dlpfc_hw4.h745 #define LPFC_SLI4_INTR17 BIT17
/drivers/tty/
Dsynclink_gt.c2294 if (gsr & (BIT17 << (i*2))) in slgt_interrupt()