1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Renesas SuperH DMA Engine support 4 * 5 * Copyright (C) 2013 Renesas Electronics, Inc. 6 */ 7 8 #ifndef SHDMA_ARM_H 9 #define SHDMA_ARM_H 10 11 #include "shdma.h" 12 13 /* Transmit sizes and respective CHCR register values */ 14 enum { 15 XMIT_SZ_8BIT = 0, 16 XMIT_SZ_16BIT = 1, 17 XMIT_SZ_32BIT = 2, 18 XMIT_SZ_64BIT = 7, 19 XMIT_SZ_128BIT = 3, 20 XMIT_SZ_256BIT = 4, 21 XMIT_SZ_512BIT = 5, 22 }; 23 24 /* log2(size / 8) - used to calculate number of transfers */ 25 #define SH_DMAE_TS_SHIFT { \ 26 [XMIT_SZ_8BIT] = 0, \ 27 [XMIT_SZ_16BIT] = 1, \ 28 [XMIT_SZ_32BIT] = 2, \ 29 [XMIT_SZ_64BIT] = 3, \ 30 [XMIT_SZ_128BIT] = 4, \ 31 [XMIT_SZ_256BIT] = 5, \ 32 [XMIT_SZ_512BIT] = 6, \ 33 } 34 35 #define TS_LOW_BIT 0x3 /* --xx */ 36 #define TS_HI_BIT 0xc /* xx-- */ 37 38 #define TS_LOW_SHIFT (3) 39 #define TS_HI_SHIFT (20 - 2) /* 2 bits for shifted low TS */ 40 41 #define TS_INDEX2VAL(i) \ 42 ((((i) & TS_LOW_BIT) << TS_LOW_SHIFT) |\ 43 (((i) & TS_HI_BIT) << TS_HI_SHIFT)) 44 45 #define CHCR_TX(xmit_sz) (DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL((xmit_sz))) 46 #define CHCR_RX(xmit_sz) (DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL((xmit_sz))) 47 48 #endif 49