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Searched refs:CLK_BASE__INST2_SEG1 (Results 1 – 14 of 14) sorted by relevance

/drivers/gpu/drm/amd/include/
Dcyan_skillfish_ip_offset.h186 #define CLK_BASE__INST2_SEG1 0 macro
Dnavi10_ip_offset.h198 #define CLK_BASE__INST2_SEG1 0 macro
Dvega20_ip_offset.h225 #define CLK_BASE__INST2_SEG1 0 macro
Dnavi12_ip_offset.h250 #define CLK_BASE__INST2_SEG1 0x02402000 macro
Ddimgrey_cavefish_ip_offset.h231 #define CLK_BASE__INST2_SEG1 0x02402000 macro
Dnavi14_ip_offset.h250 #define CLK_BASE__INST2_SEG1 0x02402000 macro
Dsienna_cichlid_ip_offset.h257 #define CLK_BASE__INST2_SEG1 0x02402000 macro
Dbeige_goby_ip_offset.h260 #define CLK_BASE__INST2_SEG1 0x02402000 macro
Drenoir_ip_offset.h332 #define CLK_BASE__INST2_SEG1 0 macro
Dvega10_ip_offset.h1218 #define CLK_BASE__INST2_SEG1 0 macro
Dyellow_carp_offset.h303 #define CLK_BASE__INST2_SEG1 0x02402000 macro
Dvangogh_ip_offset.h355 #define CLK_BASE__INST2_SEG1 0x02402000 macro
Darct_ip_offset.h317 #define CLK_BASE__INST2_SEG1 0x00017000 macro
Daldebaran_ip_offset.h332 #define CLK_BASE__INST2_SEG1 0x02402000 macro