Searched refs:CURSOR_ENABLE (Results 1 – 21 of 21) sorted by relevance
/drivers/gpu/drm/amd/display/dc/dcn10/ |
D | dcn10_ipp.h | 98 IPP_SF(CURSOR0_CURSOR_CONTROL, CURSOR_ENABLE, mask_sh), \ 118 IPP_SF(CURSOR0_0_CURSOR_CONTROL, CURSOR_ENABLE, mask_sh), \ 144 type CURSOR_ENABLE; \
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D | dcn10_dpp.c | 412 CURSOR_ENABLE, 0); in dpp1_cnv_setup()
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D | dcn10_hubp.h | 447 HUBP_SF(CURSOR0_CURSOR_CONTROL, CURSOR_ENABLE, mask_sh), \ 641 type CURSOR_ENABLE; \
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D | dcn10_hubp.c | 78 CURSOR_ENABLE, 0); in hubp1_disconnect() 1245 CURSOR_ENABLE, cur_en); in hubp1_cursor_set_position()
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D | dcn10_dpp.h | 439 TF_SF(CURSOR0_CURSOR_CONTROL, CURSOR_ENABLE, mask_sh), \ 1075 type CURSOR_ENABLE; \
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/drivers/gpu/drm/amd/display/dc/dcn21/ |
D | dcn21_hubp.h | 64 HUBP_SF(CURSOR0_0_CURSOR_CONTROL, CURSOR_ENABLE, mask_sh), \
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/drivers/gpu/drm/i915/display/ |
D | intel_cursor.c | 196 return CURSOR_ENABLE | in i845_cursor_ctl() 320 ret = intel_de_read(dev_priv, CURCNTR(PIPE_A)) & CURSOR_ENABLE; in i845_cursor_get_hw_state()
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/drivers/gpu/drm/amd/display/dc/dcn20/ |
D | dcn20_dpp.c | 245 CURSOR_ENABLE, 0); in dpp2_cnv_setup()
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D | dcn20_hubp.h | 89 HUBP_SF(CURSOR0_0_CURSOR_CONTROL, CURSOR_ENABLE, mask_sh), \
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D | dcn20_dpp.h | 554 TF_SF(CURSOR0_0_CURSOR_CONTROL, CURSOR_ENABLE, mask_sh), \
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D | dcn20_hubp.c | 1029 CURSOR_ENABLE, cur_en); in hubp2_cursor_set_position()
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/drivers/video/fbdev/intelfb/ |
D | intelfbhw.h | 332 #define CURSOR_ENABLE (1 << 31) macro
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D | intelfbhw.c | 1857 CURSOR_ENABLE | CURSOR_STRIDE_MASK); in intelfbhw_cursor_init() 1887 tmp &= ~CURSOR_ENABLE; in intelfbhw_cursor_hide() 1916 tmp |= CURSOR_ENABLE; in intelfbhw_cursor_show()
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/drivers/gpu/drm/amd/display/dc/dcn31/ |
D | dcn31_hubp.h | 197 HUBP_SF(CURSOR0_0_CURSOR_CONTROL, CURSOR_ENABLE, mask_sh), \
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/drivers/gpu/drm/tegra/ |
D | dc.h | 309 #define CURSOR_ENABLE (1 << 16) macro
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D | dc.c | 951 value |= CURSOR_ENABLE; in tegra_cursor_atomic_update() 1008 value &= ~CURSOR_ENABLE; in tegra_cursor_atomic_disable()
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/drivers/gpu/drm/amd/display/dc/dcn30/ |
D | dcn30_hubp.h | 212 HUBP_SF(CURSOR0_0_CURSOR_CONTROL, CURSOR_ENABLE, mask_sh), \
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D | dcn30_dpp.h | 314 TF_SF(CURSOR0_0_CURSOR_CONTROL, CURSOR_ENABLE, mask_sh), \
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D | dcn30_dpp.c | 341 CURSOR_ENABLE, 0); in dpp3_cnv_setup()
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/drivers/gpu/drm/amd/include/ |
D | navi10_enum.h | 2266 typedef enum CURSOR_ENABLE { enum 2269 } CURSOR_ENABLE; typedef
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/drivers/gpu/drm/i915/ |
D | i915_reg.h | 6660 #define CURSOR_ENABLE 0x80000000 macro
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