Home
last modified time | relevance | path

Searched refs:ChannelPlan (Results 1 – 19 of 19) sorted by relevance

/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_dev.c548 priv->ChannelPlan = priv->eeprom_ChannelPlan; in _rtl92e_read_eeprom_info()
550 priv->ChannelPlan = priv->RegChannelPlan; in _rtl92e_read_eeprom_info()
571 priv->ChannelPlan = priv->eeprom_ChannelPlan&0x7f; in _rtl92e_read_eeprom_info()
573 priv->ChannelPlan = 0x0; in _rtl92e_read_eeprom_info()
575 priv->ChannelPlan); in _rtl92e_read_eeprom_info()
594 if (priv->ChannelPlan > CHANNEL_PLAN_LEN - 1) in _rtl92e_read_eeprom_info()
595 priv->ChannelPlan = 0; in _rtl92e_read_eeprom_info()
596 priv->ChannelPlan = COUNTRY_CODE_WORLD_WIDE_13; in _rtl92e_read_eeprom_info()
604 RT_TRACE(COMP_INIT, "ChannelPlan = %d\n", priv->ChannelPlan); in _rtl92e_read_eeprom_info()
Drtl_core.h474 u16 ChannelPlan; member
Drtl_core.c1031 if (priv->ChannelPlan >= COUNTRY_CODE_MAX) { in _rtl92e_get_channel_map()
1034 priv->ChannelPlan = COUNTRY_CODE_FCC; in _rtl92e_get_channel_map()
1036 RT_TRACE(COMP_INIT, "Channel plan is %d\n", priv->ChannelPlan); in _rtl92e_get_channel_map()
1038 dot11d_channel_map(priv->ChannelPlan, priv->rtllib); in _rtl92e_get_channel_map()
/drivers/staging/rtl8723bs/include/
Dhal_com_phycfg.h106 void Hal_ChannelPlanToRegulation(struct adapter *Adapter, u16 ChannelPlan);
Drtw_mlme.h342 u8 ChannelPlan; member
/drivers/staging/rtl8192u/
Dr8192U_core.c127 static struct CHANNEL_LIST ChannelPlan[] = { variable
179 if (ChannelPlan[channel_plan].Len != 0) { in rtl819x_set_channel_map()
184 for (i = 0; i < ChannelPlan[channel_plan].Len; i++) { in rtl819x_set_channel_map()
185 …if (ChannelPlan[channel_plan].Channel[i] < min_chan || ChannelPlan[channel_plan].Channel[i] > max_… in rtl819x_set_channel_map()
187 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1; in rtl819x_set_channel_map()
2304 priv->ChannelPlan = priv->eeprom_ChannelPlan; in rtl8192_read_eeprom_info()
2513 if (priv->ChannelPlan > COUNTRY_CODE_GLOBAL_DOMAIN) { in rtl8192_get_channel_map()
2516 priv->ChannelPlan = 0; in rtl8192_get_channel_map()
2518 RT_TRACE(COMP_INIT, "Channel plan is %d\n", priv->ChannelPlan); in rtl8192_get_channel_map()
2520 rtl819x_set_channel_map(priv->ChannelPlan, priv); in rtl8192_get_channel_map()
Dr8192U.h957 u8 ChannelPlan; member
/drivers/staging/r8188eu/include/
Drtl8188e_hal.h146 enum ChannelPlan { enum
Drtw_mlme.h369 u8 ChannelPlan; member
/drivers/staging/rtl8712/
Drtl871x_cmd.h321 enum _RT_CHANNEL_DOMAIN ChannelPlan; member
Drtl871x_cmd.c247 psetchplanpara->ChannelPlan = chplan; in r8712_set_chplan_cmd()
/drivers/staging/rtl8723bs/hal/
Dhal_com_phycfg.c858 void Hal_ChannelPlanToRegulation(struct adapter *Adapter, u16 ChannelPlan) in Hal_ChannelPlanToRegulation() argument
863 switch (ChannelPlan) { in Hal_ChannelPlanToRegulation()
Drtl8723b_hal_init.c2375 padapter->mlmepriv.ChannelPlan = hal_com_config_channel_plan( in Hal_EfuseParseChnlPlan_8723B()
2383 Hal_ChannelPlanToRegulation(padapter, padapter->mlmepriv.ChannelPlan); in Hal_EfuseParseChnlPlan_8723B()
/drivers/staging/rtl8723bs/core/
Drtw_mlme_ext.c335 static u8 init_channel_set(struct adapter *padapter, u8 ChannelPlan, struct rt_channel_info *channe… in init_channel_set() argument
343 if (ChannelPlan >= RT_CHANNEL_DOMAIN_MAX && ChannelPlan != RT_CHANNEL_DOMAIN_REALTEK_DEFINE) in init_channel_set()
348 if (RT_CHANNEL_DOMAIN_REALTEK_DEFINE == ChannelPlan) in init_channel_set()
351 Index2G = RTW_ChannelPlanMap[ChannelPlan].Index2G; in init_channel_set()
358 …if ((RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN == ChannelPlan) ||/* Channel 1~11 is active, and 12~14 is pas… in init_channel_set()
359 (RT_CHANNEL_DOMAIN_GLOBAL_NULL == ChannelPlan)) { in init_channel_set()
364 } else if (RT_CHANNEL_DOMAIN_WORLD_WIDE_13 == ChannelPlan || in init_channel_set()
398 …pmlmeext->max_chan_nums = init_channel_set(padapter, pmlmepriv->ChannelPlan, pmlmeext->channel_set… in init_mlme_ext_priv()
Drtw_cmd.c1203 padapter->mlmepriv.ChannelPlan = chplan; in rtw_set_chplan_cmd()
/drivers/staging/r8188eu/core/
Drtw_mlme_ext.c305 static u8 init_channel_set(struct adapter *padapter, u8 ChannelPlan, struct rt_channel_info *channe… in init_channel_set() argument
313 if (ChannelPlan >= RT_CHANNEL_DOMAIN_MAX && ChannelPlan != RT_CHANNEL_DOMAIN_REALTEK_DEFINE) { in init_channel_set()
314 DBG_88E("ChannelPlan ID %x error !!!!!\n", ChannelPlan); in init_channel_set()
320 if (RT_CHANNEL_DOMAIN_REALTEK_DEFINE == ChannelPlan) in init_channel_set()
323 Index2G = RTW_ChannelPlanMap[ChannelPlan].Index2G; in init_channel_set()
330 …if ((RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN == ChannelPlan) ||/* Channel 1~11 is active, and 12~14 is pas… in init_channel_set()
331 (RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN_2G == ChannelPlan)) { in init_channel_set()
336 } else if (RT_CHANNEL_DOMAIN_WORLD_WIDE_13 == ChannelPlan || in init_channel_set()
371 …pmlmeext->max_chan_nums = init_channel_set(padapter, pmlmepriv->ChannelPlan, pmlmeext->channel_set… in init_mlme_ext_priv()
Drtw_cmd.c1348 padapter->mlmepriv.ChannelPlan = chplan; in rtw_set_chplan_cmd()
/drivers/staging/r8188eu/hal/
Drtl8188e_hal_init.c2193 padapter->mlmepriv.ChannelPlan = in rtl8188e_EfuseParseChnlPlan()
2199 DBG_88E("mlmepriv.ChannelPlan = 0x%02x\n", padapter->mlmepriv.ChannelPlan); in rtl8188e_EfuseParseChnlPlan()
/drivers/staging/r8188eu/os_dep/
Dioctl_linux.c2110 DBG_88E("%s set channel_plan = 0x%02X\n", __func__, pmlmepriv->ChannelPlan); in rtw_wx_set_channel_plan()