Home
last modified time | relevance | path

Searched refs:DPCS_BASE__INST5_SEG5 (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/amd/include/
Ddimgrey_cavefish_ip_offset.h452 #define DPCS_BASE__INST5_SEG5 0 macro
Dbeige_goby_ip_offset.h530 #define DPCS_BASE__INST5_SEG5 0 macro
Dyellow_carp_offset.h475 #define DPCS_BASE__INST5_SEG5 0 macro
Dvangogh_ip_offset.h548 #define DPCS_BASE__INST5_SEG5 0 macro