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Searched refs:DP_DPHY_HBR2_PATTERN_CONTROL (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dce/
Ddce_link_encoder.h121 SRI(DP_DPHY_HBR2_PATTERN_CONTROL, DP, id), \
127 SRI(DP_DPHY_HBR2_PATTERN_CONTROL, DP, id), \
134 SRI(DP_DPHY_HBR2_PATTERN_CONTROL, DP, id)
182 uint32_t DP_DPHY_HBR2_PATTERN_CONTROL; member
Ddce_link_encoder.c450 if (REG(DP_DPHY_HBR2_PATTERN_CONTROL)) in set_dp_phy_pattern_hbr2_compliance_cp2520_2()
451 REG_UPDATE(DP_DPHY_HBR2_PATTERN_CONTROL, in set_dp_phy_pattern_hbr2_compliance_cp2520_2()
452 DP_DPHY_HBR2_PATTERN_CONTROL, cp2520_pattern); in set_dp_phy_pattern_hbr2_compliance_cp2520_2()
502 if (REG(DP_DPHY_HBR2_PATTERN_CONTROL)) in dce60_set_dp_phy_pattern_hbr2_compliance_cp2520_2()
503 REG_UPDATE(DP_DPHY_HBR2_PATTERN_CONTROL, in dce60_set_dp_phy_pattern_hbr2_compliance_cp2520_2()
504 DP_DPHY_HBR2_PATTERN_CONTROL, cp2520_pattern); in dce60_set_dp_phy_pattern_hbr2_compliance_cp2520_2()
/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_link_encoder.h66 SRI(DP_DPHY_HBR2_PATTERN_CONTROL, DP, id)
107 uint32_t DP_DPHY_HBR2_PATTERN_CONTROL; member
202 LE_SF(DP0_DP_DPHY_HBR2_PATTERN_CONTROL, DP_DPHY_HBR2_PATTERN_CONTROL, mask_sh),\
252 type DP_DPHY_HBR2_PATTERN_CONTROL;\
Ddcn10_link_encoder.c382 if (REG(DP_DPHY_HBR2_PATTERN_CONTROL)) in set_dp_phy_pattern_hbr2_compliance_cp2520_2()
383 REG_UPDATE(DP_DPHY_HBR2_PATTERN_CONTROL, in set_dp_phy_pattern_hbr2_compliance_cp2520_2()
384 DP_DPHY_HBR2_PATTERN_CONTROL, cp2520_pattern); in set_dp_phy_pattern_hbr2_compliance_cp2520_2()
/drivers/gpu/drm/amd/display/dc/dcn301/
Ddcn301_dio_link_encoder.h56 SRI(DP_DPHY_HBR2_PATTERN_CONTROL, DP, id)
/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_dio_link_encoder.h55 SRI(DP_DPHY_HBR2_PATTERN_CONTROL, DP, id)