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Searched refs:DSC (Results 1 – 12 of 12) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dsc/
DMakefile4 DSC = dc_dsc.o rc_calc.o rc_calc_dpi.o macro
6 AMD_DAL_DSC = $(addprefix $(AMDDALPATH)/dc/dsc/,$(DSC))
/drivers/gpu/drm/amd/display/dc/core/
Ddc_link_hwss.c519 if (!pipe_ctx->stream->timing.flags.DSC) in dp_set_dsc_enable()
543 if (!pipe_ctx->stream->timing.flags.DSC || !dsc) in dp_set_dsc_pps_sdp()
586 if (!pipe_ctx->stream->timing.flags.DSC) in dp_update_dsc_config()
Ddc_link.c3312 !pipe_ctx->stream->timing.flags.DSC) { in core_link_enable_stream()
3329 if (pipe_ctx->stream->timing.flags.DSC) { in core_link_enable_stream()
3372 if (pipe_ctx->stream->timing.flags.DSC) { in core_link_enable_stream()
3463 if (pipe_ctx->stream->timing.flags.DSC) { in core_link_disable_stream()
3737 if (timing->flags.DSC) in dc_bandwidth_in_kbps_from_timing()
Ddc.c527 param.dsc_mode = pipe->stream->timing.flags.DSC ? 1:0; in dc_stream_configure_crc()
1453 if (crtc_timing->flags.DSC) in dc_validate_seamless_boot_timing()
2523 uint32_t old_dsc_enabled = stream->timing.flags.DSC; in copy_stream_update_to_stream()
2534 stream->timing.flags.DSC = enable_dsc; in copy_stream_update_to_stream()
2537 stream->timing.flags.DSC = old_dsc_enabled; in copy_stream_update_to_stream()
/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_mst_types.c626 params[i].timing->flags.DSC = 1; in set_dsc_configs_from_fairness_vars()
639 params[i].timing->flags.DSC = 0; in set_dsc_configs_from_fairness_vars()
846 stream->timing.flags.DSC = 0; in compute_mst_dsc_configs_for_link()
975 if (stream->timing.flags.DSC == 1) in compute_mst_dsc_configs_for_state()
Damdgpu_dm.c6089 stream->timing.flags.DSC = 0; in update_dsc_caps()
6122 stream->timing.flags.DSC = 1; in apply_dsc_policy_for_stream()
6129 stream->timing.flags.DSC = 1; in apply_dsc_policy_for_stream()
6131 if (stream->timing.flags.DSC && aconnector->dsc_settings.dsc_num_slices_h) in apply_dsc_policy_for_stream()
6134 if (stream->timing.flags.DSC && aconnector->dsc_settings.dsc_num_slices_v) in apply_dsc_policy_for_stream()
6137 if (stream->timing.flags.DSC && aconnector->dsc_settings.dsc_bits_per_pixel) in apply_dsc_policy_for_stream()
7339 if (stream->timing.flags.DSC != 1) { in dm_update_mst_vcpi_slots_for_dsc()
/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_dccg.c135 (timing->flags.DSC && timing->pixel_encoding == PIXEL_ENCODING_YCBCR422 in dccg31_set_dtbclk_dto()
/drivers/gpu/drm/amd/display/dc/
Ddc_hw_types.h706 uint32_t DSC : 1; /* Use DSC with this timing */ member
/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_stream_encoder.c441 two_pix = two_pix || (timing->flags.DSC && timing->pixel_encoding == PIXEL_ENCODING_YCBCR422 in is_two_pixels_per_containter()
Ddcn20_resource.c1784 if (result == DC_OK && dc_stream->timing.flags.DSC) in dcn20_add_stream_to_ctx()
1940 if (next_odm_pipe->stream->timing.flags.DSC == 1 && !next_odm_pipe->top_pipe) { in dcn20_split_stream_for_odm()
2035 pipes[pipe_cnt].dout.dsc_enable = res_ctx->pipe_ctx[i].stream->timing.flags.DSC; in dcn20_populate_dml_pipes_from_context()
2173 if (res_ctx->pipe_ctx[i].stream->timing.flags.DSC && in dcn20_populate_dml_pipes_from_context()
2185 if (res_ctx->pipe_ctx[i].stream->timing.flags.DSC) in dcn20_populate_dml_pipes_from_context()
2467 if (pipe_ctx->top_pipe || pipe_ctx->prev_odm_pipe || !stream || !stream->timing.flags.DSC) in dcn20_validate_dsc()
/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_optc.c1616 two_pix = two_pix || (timing->flags.DSC && timing->pixel_encoding == PIXEL_ENCODING_YCBCR422 in optc1_is_two_pixels_per_containter()
/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_resource.c1800 if (sec_pipe->stream->timing.flags.DSC == 1) { in dcn30_split_stream_for_mpc_or_odm()