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Searched refs:DSPCLK_GATE_D (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/gma500/
Dcdv_device.c271 regs->cdv.saveDSPCLK_GATE_D = REG_READ(DSPCLK_GATE_D); in cdv_save_display_registers()
325 REG_WRITE(DSPCLK_GATE_D, regs->cdv.saveDSPCLK_GATE_D); in cdv_restore_display_registers()
Dpsb_intel_reg.h1257 #define DSPCLK_GATE_D 0x6200 macro
Dcdv_intel_dp.c1936 reg_value = REG_READ(DSPCLK_GATE_D); in cdv_disable_intel_clock_gating()
1945 REG_WRITE(DSPCLK_GATE_D, reg_value); in cdv_disable_intel_clock_gating()
/drivers/gpu/drm/i915/display/
Dvlv_dsi.c824 val = intel_de_read(dev_priv, DSPCLK_GATE_D); in intel_dsi_pre_enable()
826 intel_de_write(dev_priv, DSPCLK_GATE_D, val); in intel_dsi_pre_enable()
1000 val = intel_de_read(dev_priv, DSPCLK_GATE_D); in intel_dsi_post_disable()
1002 intel_de_write(dev_priv, DSPCLK_GATE_D, val); in intel_dsi_post_disable()
Dintel_gmbus.c167 val = intel_de_read(dev_priv, DSPCLK_GATE_D); in pnv_gmbus_clock_gating()
172 intel_de_write(dev_priv, DSPCLK_GATE_D, val); in pnv_gmbus_clock_gating()
Dintel_overlay.c212 intel_de_write(dev_priv, DSPCLK_GATE_D, 0); in i830_overlay_clock_gating()
214 intel_de_write(dev_priv, DSPCLK_GATE_D, in i830_overlay_clock_gating()
Dintel_display_power.c1386 val = intel_de_read(dev_priv, DSPCLK_GATE_D); in vlv_init_display_clock_gating()
1389 intel_de_write(dev_priv, DSPCLK_GATE_D, val); in vlv_init_display_clock_gating()
/drivers/gpu/drm/i915/
Dintel_pm.c7949 intel_uncore_write(&dev_priv->uncore, DSPCLK_GATE_D, dspclk_gate); in g4x_init_clock_gating()
7960 intel_uncore_write(uncore, DSPCLK_GATE_D, 0); in i965gm_init_clock_gating()
Di915_reg.h3649 #define DSPCLK_GATE_D _MMIO(DISPLAY_MMIO_BASE(dev_priv) + 0x6200) macro