Home
last modified time | relevance | path

Searched refs:GROUP (Results 1 – 25 of 44) sorted by relevance

12

/drivers/pinctrl/meson/
Dpinctrl-meson-g12a.c524 GROUP(emmc_nand_d0, 1),
525 GROUP(emmc_nand_d1, 1),
526 GROUP(emmc_nand_d2, 1),
527 GROUP(emmc_nand_d3, 1),
528 GROUP(emmc_nand_d4, 1),
529 GROUP(emmc_nand_d5, 1),
530 GROUP(emmc_nand_d6, 1),
531 GROUP(emmc_nand_d7, 1),
532 GROUP(emmc_clk, 1),
533 GROUP(emmc_cmd, 1),
[all …]
Dpinctrl-meson-a1.c407 GROUP(psram_clkn, 1),
408 GROUP(psram_clkp, 1),
409 GROUP(psram_ce_n, 1),
410 GROUP(psram_rst_n, 1),
411 GROUP(psram_adq0, 1),
412 GROUP(psram_adq1, 1),
413 GROUP(psram_adq2, 1),
414 GROUP(psram_adq3, 1),
415 GROUP(psram_adq4, 1),
416 GROUP(psram_adq5, 1),
[all …]
Dpinctrl-meson-axg.c449 GROUP(emmc_nand_d0, 1),
450 GROUP(emmc_nand_d1, 1),
451 GROUP(emmc_nand_d2, 1),
452 GROUP(emmc_nand_d3, 1),
453 GROUP(emmc_nand_d4, 1),
454 GROUP(emmc_nand_d5, 1),
455 GROUP(emmc_nand_d6, 1),
456 GROUP(emmc_nand_d7, 1),
457 GROUP(emmc_clk, 1),
458 GROUP(emmc_cmd, 1),
[all …]
Dpinctrl-meson8b.c444 GROUP(sd_d0_a, 8, 5),
445 GROUP(sd_d1_a, 8, 4),
446 GROUP(sd_d2_a, 8, 3),
447 GROUP(sd_d3_a, 8, 2),
448 GROUP(sdxc_d0_0_a, 5, 29),
449 GROUP(sdxc_d47_a, 5, 12),
450 GROUP(sdxc_d13_0_a, 5, 28),
451 GROUP(sd_clk_a, 8, 1),
452 GROUP(sd_cmd_a, 8, 0),
453 GROUP(xtal_32k_out, 3, 22),
[all …]
Dpinctrl-meson8.c531 GROUP(sd_d0_a, 8, 5),
532 GROUP(sd_d1_a, 8, 4),
533 GROUP(sd_d2_a, 8, 3),
534 GROUP(sd_d3_a, 8, 2),
535 GROUP(sd_clk_a, 8, 1),
536 GROUP(sd_cmd_a, 8, 0),
538 GROUP(sdxc_d0_a, 5, 14),
539 GROUP(sdxc_d13_a, 5, 13),
540 GROUP(sdxc_d47_a, 5, 12),
541 GROUP(sdxc_clk_a, 5, 11),
[all …]
Dpinctrl-meson-gxl.c414 GROUP(sdio_d0, 5, 31),
415 GROUP(sdio_d1, 5, 30),
416 GROUP(sdio_d2, 5, 29),
417 GROUP(sdio_d3, 5, 28),
418 GROUP(sdio_clk, 5, 27),
419 GROUP(sdio_cmd, 5, 26),
420 GROUP(sdio_irq, 5, 24),
421 GROUP(uart_tx_a, 5, 19),
422 GROUP(uart_rx_a, 5, 18),
423 GROUP(uart_cts_a, 5, 17),
[all …]
Dpinctrl-meson-gxbb.c440 GROUP(sdio_d0, 8, 5),
441 GROUP(sdio_d1, 8, 4),
442 GROUP(sdio_d2, 8, 3),
443 GROUP(sdio_d3, 8, 2),
444 GROUP(sdio_cmd, 8, 1),
445 GROUP(sdio_clk, 8, 0),
446 GROUP(sdio_irq, 8, 11),
447 GROUP(uart_tx_a, 4, 13),
448 GROUP(uart_rx_a, 4, 12),
449 GROUP(uart_cts_a, 4, 11),
[all …]
/drivers/pinctrl/renesas/
Dpfc-sh7264.c1468 { PINMUX_CFG_REG("PAIOR0", 0xfffe3812, 16, 1, GROUP(
1478 { PINMUX_CFG_REG("PBCR5", 0xfffe3824, 16, 4, GROUP(
1489 { PINMUX_CFG_REG("PBCR4", 0xfffe3826, 16, 4, GROUP(
1499 { PINMUX_CFG_REG("PBCR3", 0xfffe3828, 16, 4, GROUP(
1509 { PINMUX_CFG_REG("PBCR2", 0xfffe382a, 16, 4, GROUP(
1519 { PINMUX_CFG_REG("PBCR1", 0xfffe382c, 16, 4, GROUP(
1529 { PINMUX_CFG_REG("PBCR0", 0xfffe382e, 16, 4, GROUP(
1540 { PINMUX_CFG_REG("PBIOR1", 0xfffe3830, 16, 1, GROUP(
1553 { PINMUX_CFG_REG("PBIOR0", 0xfffe3832, 16, 1, GROUP(
1572 { PINMUX_CFG_REG("PCCR2", 0xfffe384a, 16, 4, GROUP(
[all …]
Dpfc-sh7722.c1240 { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2, GROUP(
1250 { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2, GROUP(
1260 { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2, GROUP(
1270 { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2, GROUP(
1280 { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2, GROUP(
1290 { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2, GROUP(
1300 { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2, GROUP(
1310 { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2, GROUP(
1320 { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2, GROUP(
1330 { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2, GROUP(
[all …]
Dpfc-sh7720.c928 { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2, GROUP(
938 { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2, GROUP(
948 { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2, GROUP(
958 { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2, GROUP(
968 { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2, GROUP(
978 { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2, GROUP(
988 { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2, GROUP(
998 { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2, GROUP(
1008 { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2, GROUP(
1018 { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2, GROUP(
[all …]
Dpfc-sh7757.c1686 { PINMUX_CFG_REG("PACR", 0xffec0000, 16, 2, GROUP(
1696 { PINMUX_CFG_REG("PBCR", 0xffec0002, 16, 2, GROUP(
1706 { PINMUX_CFG_REG("PCCR", 0xffec0004, 16, 2, GROUP(
1716 { PINMUX_CFG_REG("PDCR", 0xffec0006, 16, 2, GROUP(
1726 { PINMUX_CFG_REG("PECR", 0xffec0008, 16, 2, GROUP(
1736 { PINMUX_CFG_REG("PFCR", 0xffec000a, 16, 2, GROUP(
1746 { PINMUX_CFG_REG("PGCR", 0xffec000c, 16, 2, GROUP(
1756 { PINMUX_CFG_REG("PHCR", 0xffec000e, 16, 2, GROUP(
1766 { PINMUX_CFG_REG("PICR", 0xffec0010, 16, 2, GROUP(
1776 { PINMUX_CFG_REG("PJCR", 0xffec0012, 16, 2, GROUP(
[all …]
Dpfc-sh7785.c988 { PINMUX_CFG_REG("PACR", 0xffe70000, 16, 2, GROUP(
998 { PINMUX_CFG_REG("PBCR", 0xffe70002, 16, 2, GROUP(
1008 { PINMUX_CFG_REG("PCCR", 0xffe70004, 16, 2, GROUP(
1018 { PINMUX_CFG_REG("PDCR", 0xffe70006, 16, 2, GROUP(
1028 { PINMUX_CFG_REG("PECR", 0xffe70008, 16, 2, GROUP(
1038 { PINMUX_CFG_REG("PFCR", 0xffe7000a, 16, 2, GROUP(
1048 { PINMUX_CFG_REG("PGCR", 0xffe7000c, 16, 2, GROUP(
1058 { PINMUX_CFG_REG("PHCR", 0xffe7000e, 16, 2, GROUP(
1068 { PINMUX_CFG_REG("PJCR", 0xffe70010, 16, 2, GROUP(
1078 { PINMUX_CFG_REG("PKCR", 0xffe70012, 16, 2, GROUP(
[all …]
Dpfc-sh7269.c1970 { PINMUX_CFG_REG("PAIOR0", 0xfffe3812, 16, 1, GROUP(
1976 { PINMUX_CFG_REG("PBCR5", 0xfffe3824, 16, 4, GROUP(
1990 { PINMUX_CFG_REG("PBCR4", 0xfffe3826, 16, 4, GROUP(
2007 { PINMUX_CFG_REG("PBCR3", 0xfffe3828, 16, 4, GROUP(
2023 { PINMUX_CFG_REG("PBCR2", 0xfffe382a, 16, 4, GROUP(
2036 { PINMUX_CFG_REG("PBCR1", 0xfffe382c, 16, 4, GROUP(
2049 { PINMUX_CFG_REG("PBCR0", 0xfffe382e, 16, 4, GROUP(
2062 { PINMUX_CFG_REG("PBIOR1", 0xfffe3830, 16, 1, GROUP(
2074 { PINMUX_CFG_REG("PBIOR0", 0xfffe3832, 16, 1, GROUP(
2093 { PINMUX_CFG_REG("PCCR2", 0xfffe384a, 16, 4, GROUP(
[all …]
Dpfc-sh7203.c1076 { PINMUX_CFG_REG("PBIORL", 0xfffe3886, 16, 1, GROUP(
1094 { PINMUX_CFG_REG("PBCRL4", 0xfffe3890, 16, 4, GROUP(
1104 { PINMUX_CFG_REG("PBCRL3", 0xfffe3892, 16, 4, GROUP(
1117 { PINMUX_CFG_REG("PBCRL2", 0xfffe3894, 16, 4, GROUP(
1130 { PINMUX_CFG_REG("PBCRL1", 0xfffe3896, 16, 4, GROUP(
1143 { PINMUX_CFG_REG("IFCR", 0xfffe38a2, 16, 4, GROUP(
1153 { PINMUX_CFG_REG("PCIORL", 0xfffe3906, 16, 1, GROUP(
1171 { PINMUX_CFG_REG("PCCRL4", 0xfffe3910, 16, 4, GROUP(
1183 { PINMUX_CFG_REG("PCCRL3", 0xfffe3912, 16, 4, GROUP(
1196 { PINMUX_CFG_REG("PCCRL2", 0xfffe3914, 16, 4, GROUP(
[all …]
Dpfc-sh7723.c1510 { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2, GROUP(
1520 { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2, GROUP(
1530 { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2, GROUP(
1540 { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2, GROUP(
1550 { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2, GROUP(
1560 { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2, GROUP(
1570 { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2, GROUP(
1580 { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2, GROUP(
1590 { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2, GROUP(
1600 { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2, GROUP(
[all …]
Dpfc-sh7724.c1742 { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2, GROUP(
1752 { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2, GROUP(
1762 { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2, GROUP(
1772 { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2, GROUP(
1782 { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2, GROUP(
1792 { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2, GROUP(
1802 { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2, GROUP(
1812 { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2, GROUP(
1822 { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2, GROUP(
1832 { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2, GROUP(
[all …]
Dpfc-sh7786.c630 { PINMUX_CFG_REG("PACR", 0xffcc0000, 16, 2, GROUP(
640 { PINMUX_CFG_REG("PBCR", 0xffcc0002, 16, 2, GROUP(
650 { PINMUX_CFG_REG("PCCR", 0xffcc0004, 16, 2, GROUP(
660 { PINMUX_CFG_REG("PDCR", 0xffcc0006, 16, 2, GROUP(
670 { PINMUX_CFG_REG("PECR", 0xffcc0008, 16, 2, GROUP(
680 { PINMUX_CFG_REG("PFCR", 0xffcc000a, 16, 2, GROUP(
690 { PINMUX_CFG_REG("PGCR", 0xffcc000c, 16, 2, GROUP(
700 { PINMUX_CFG_REG("PHCR", 0xffcc000e, 16, 2, GROUP(
710 { PINMUX_CFG_REG("PJCR", 0xffcc0010, 16, 2, GROUP(
720 { PINMUX_CFG_REG("P1MSELR", 0xffcc0080, 16, 1, GROUP(
[all …]
Dpfc-r8a77470.c2563 { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1, GROUP(
2597 { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1, GROUP(
2631 { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1, GROUP(
2665 { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1, GROUP(
2699 { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1, GROUP(
2733 { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1, GROUP(
2768 GROUP(4, 4, 4, 4, 4, 4, 4, 4),
2769 GROUP(
2796 GROUP(4, 4, 4, 4, 4, 4, 4, 4),
2797 GROUP(
[all …]
Dpfc-sh7734.c1638 { PINMUX_CFG_REG("GPSR0", 0xFFFC0004, 32, 1, GROUP(
1672 { PINMUX_CFG_REG("GPSR1", 0xFFFC0008, 32, 1, GROUP(
1706 { PINMUX_CFG_REG("GPSR2", 0xFFFC000C, 32, 1, GROUP(
1740 { PINMUX_CFG_REG("GPSR3", 0xFFFC0010, 32, 1, GROUP(
1775 { PINMUX_CFG_REG("GPSR4", 0xFFFC0014, 32, 1, GROUP(
1809 { PINMUX_CFG_REG("GPSR5", 0xFFFC0018, 32, 1, GROUP(
1826 GROUP(2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2),
1827 GROUP(
1863 GROUP(3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2),
1864 GROUP(
[all …]
Dpfc-r8a7792.c2010 { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1, GROUP(
2044 { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1, GROUP(
2078 { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1, GROUP(
2112 { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1, GROUP(
2146 { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1, GROUP(
2180 { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1, GROUP(
2214 { PINMUX_CFG_REG("GPSR6", 0xE606001C, 32, 1, GROUP(
2248 { PINMUX_CFG_REG("GPSR7", 0xE6060020, 32, 1, GROUP(
2282 { PINMUX_CFG_REG("GPSR8", 0xE6060024, 32, 1, GROUP(
2316 { PINMUX_CFG_REG("GPSR9", 0xE6060028, 32, 1, GROUP(
[all …]
Dpfc-emev2.c1434 { PINMUX_CFG_REG("GPSR0", 0xe0140200, 32, 1, GROUP(
1469 { PINMUX_CFG_REG("GPSR1", 0xe0140204, 32, 1, GROUP(
1504 { PINMUX_CFG_REG("GPSR2", 0xe0140208, 32, 1, GROUP(
1539 { PINMUX_CFG_REG("GPSR3", 0xe014020c, 32, 1, GROUP(
1574 { PINMUX_CFG_REG("GPSR4", 0xe0140210, 32, 1, GROUP(
1610 GROUP(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1613 GROUP(
1630 GROUP(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1633 GROUP(
1644 GROUP(1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
[all …]
Dpfc-shx3.c434 { PINMUX_CFG_REG("PABCR", 0xffc70000, 32, 2, GROUP(
452 { PINMUX_CFG_REG("PCDCR", 0xffc70004, 32, 2, GROUP(
470 { PINMUX_CFG_REG("PEFCR", 0xffc70008, 32, 2, GROUP(
488 { PINMUX_CFG_REG("PGHCR", 0xffc7000c, 32, 2, GROUP(
510 { PINMUX_DATA_REG("PABDR", 0xffc70010, 32, GROUP(
518 { PINMUX_DATA_REG("PCDDR", 0xffc70014, 32, GROUP(
526 { PINMUX_DATA_REG("PEFDR", 0xffc70018, 32, GROUP(
534 { PINMUX_DATA_REG("PGHDR", 0xffc7001c, 32, GROUP(
Dpfc-r8a7779.c3157 { PINMUX_CFG_REG("GPSR0", 0xfffc0004, 32, 1, GROUP(
3191 { PINMUX_CFG_REG("GPSR1", 0xfffc0008, 32, 1, GROUP(
3225 { PINMUX_CFG_REG("GPSR2", 0xfffc000c, 32, 1, GROUP(
3259 { PINMUX_CFG_REG("GPSR3", 0xfffc0010, 32, 1, GROUP(
3293 { PINMUX_CFG_REG("GPSR4", 0xfffc0014, 32, 1, GROUP(
3327 { PINMUX_CFG_REG("GPSR5", 0xfffc0018, 32, 1, GROUP(
3361 { PINMUX_CFG_REG("GPSR6", 0xfffc001c, 32, 1, GROUP(
3380 GROUP(1, 3, 2, 1, 2, 4, 3, 2, 2, 2, 2, 2, 3, 3),
3381 GROUP(
3419 GROUP(3, 4, 2, 2, 2, 4, 4, 4, 3, 2, 2),
[all …]
Dpfc-r8a7790.c5032 { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1, GROUP(
5066 { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1, GROUP(
5100 { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1, GROUP(
5134 { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1, GROUP(
5168 { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1, GROUP(
5202 { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1, GROUP(
5237 GROUP(1, 4, 4, 3, 4, 4, 3, 3, 3, 3),
5238 GROUP(
5274 GROUP(2, 2, 2, 4, 4, 3, 3, 4, 4, 4),
5275 GROUP(
[all …]
Dpfc-r8a7794.c4681 { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1, GROUP(
4715 { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1, GROUP(
4749 { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1, GROUP(
4783 { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1, GROUP(
4817 { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1, GROUP(
4851 { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1, GROUP(
4885 { PINMUX_CFG_REG("GPSR6", 0xE606001C, 32, 1, GROUP(
4920 GROUP(2, 2, 2, 1, 1, 2, 2, 2, 1, 1, 1, 1,
4922 GROUP(
4975 GROUP(2, 2, 1, 1, 1, 1, 2, 2, 2, 3, 2, 2,
[all …]

12