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Searched refs:HDA_BASE__INST4_SEG0 (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/amd/include/
Dnavi12_ip_offset.h555 #define HDA_BASE__INST4_SEG0 0 macro
Dnavi14_ip_offset.h555 #define HDA_BASE__INST4_SEG0 0 macro
Dsienna_cichlid_ip_offset.h562 #define HDA_BASE__INST4_SEG0 0 macro
Dbeige_goby_ip_offset.h665 #define HDA_BASE__INST4_SEG0 0 macro
Drenoir_ip_offset.h679 #define HDA_BASE__INST4_SEG0 0 macro