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Searched refs:I915_MAP_WB (Results 1 – 25 of 29) sorted by relevance

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/drivers/gpu/drm/i915/gem/
Di915_gem_object_types.h176 I915_MAP_WB = 0, enumerator
179 I915_MAP_FORCE_WB = I915_MAP_WB | I915_MAP_OVERRIDE,
Di915_gem_pages.c278 case I915_MAP_WB: in i915_gem_object_map_page()
410 type = I915_MAP_WB; in i915_gem_object_pin_map()
Di915_gem_dmabuf.c77 vaddr = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB); in i915_gem_dmabuf_vmap()
/drivers/gpu/drm/i915/gt/
Dselftest_engine_cs.c78 cs = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB); in create_empty_batch()
214 cs = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB); in create_nop_batch()
Dselftest_workarounds.c115 cs = i915_gem_object_pin_map_unlocked(result, I915_MAP_WB); in read_nonprivs()
227 vaddr = i915_gem_object_pin_map(results, I915_MAP_WB); in check_whitelist()
557 results = i915_gem_object_pin_map(scratch->obj, I915_MAP_WB); in check_dirty_whitelist()
1044 a = i915_gem_object_pin_map_unlocked(A->obj, I915_MAP_WB); in check_whitelisted_registers()
1048 b = i915_gem_object_pin_map_unlocked(B->obj, I915_MAP_WB); in check_whitelisted_registers()
Dshmem_utils.c44 I915_MAP_WC : I915_MAP_WB); in shmem_create_from_object()
Dintel_renderstate.c56 d = i915_gem_object_pin_map(so->vma->obj, I915_MAP_WB); in render_state_setup()
Dselftest_mocs.c83 arg->vaddr = i915_gem_object_pin_map_unlocked(arg->scratch->obj, I915_MAP_WB); in live_mocs_init()
Dintel_timeline.c61 vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB); in intel_timeline_pin_map()
Dselftest_lrc.c428 cs = i915_gem_object_pin_map(scratch->obj, I915_MAP_WB); in __live_lrc_state()
630 cs = i915_gem_object_pin_map_unlocked(scratch->obj, I915_MAP_WB); in __live_lrc_gpr()
Dintel_ring_submission.c463 vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB); in ring_context_init_default_state()
Dintel_lrc.c1538 batch = i915_gem_object_pin_map(wa_ctx->vma->obj, I915_MAP_WB); in lrc_init_wa_ctx()
Dselftest_timeline.c835 w->map = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB); in setup_watcher()
Dintel_workarounds.c2228 results = i915_gem_object_pin_map(vma->obj, I915_MAP_WB); in engine_wa_list_verify()
Dintel_engine_cs.c727 vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB); in init_status_page()
Dselftest_hangcheck.c66 vaddr = i915_gem_object_pin_map_unlocked(h->hws, I915_MAP_WB); in hang_init()
/drivers/gpu/drm/i915/gem/selftests/
Di915_gem_context.c918 cmd = i915_gem_object_pin_map(rpcs, I915_MAP_WB); in rpcs_query_batch()
1113 buf = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB); in __read_slice_count()
1530 cmd = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB); in write_to_scratch()
1641 cmd = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB); in read_from_scratch()
1677 cmd = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB); in read_from_scratch()
1734 cmd = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB); in read_from_scratch()
Di915_gem_dmabuf.c307 obj_map = i915_gem_object_pin_map(obj, I915_MAP_WB); in igt_dmabuf_import()
Dhuge_pages.c1479 vaddr = i915_gem_object_pin_map_unlocked(obj, I915_MAP_WB); in igt_tmpfs_fallback()
/drivers/gpu/drm/i915/selftests/
Digt_spinner.c89 vaddr = igt_spinner_pin_obj(ce, ww, spin->hws, I915_MAP_WB, &spin->hws_vma); in igt_spinner_pin()
Dintel_memory_region.c976 case I915_MAP_WB: in repr_type()
1139 I915_MAP_WB, in perf_memcpy()
/drivers/gpu/drm/i915/
Di915_perf.c1586 i915_gem_object_pin_map_unlocked(bo, I915_MAP_WB); in alloc_oa_buffer()
1675 batch = cs = i915_gem_object_pin_map(bo, I915_MAP_WB); in alloc_noa_wait()
1888 cs = i915_gem_object_pin_map(obj, I915_MAP_WB); in alloc_oa_config_buffer()
Di915_cmd_parser.c1159 dst = i915_gem_object_pin_map(dst_obj, I915_MAP_WB); in copy_batch()
Di915_drv.h1974 return I915_MAP_WB; in i915_coherent_map_type()
/drivers/gpu/drm/i915/gvt/
Dcmd_parser.c1938 bb->va = i915_gem_object_pin_map(bb->obj, I915_MAP_WB); in perform_bb_shadow()
3011 map = i915_gem_object_pin_map(obj, I915_MAP_WB); in shadow_indirect_ctx()

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