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Searched refs:IMR (Results 1 – 24 of 24) sorted by relevance

/drivers/pci/controller/
Dpcie-xilinx-cpm.c60 #define IMR(x) BIT(XILINX_CPM_PCIE_INTR_ ##x) macro
64 IMR(LINK_DOWN) | \
65 IMR(HOT_RESET) | \
66 IMR(CFG_PCIE_TIMEOUT) | \
67 IMR(CFG_TIMEOUT) | \
68 IMR(CORRECTABLE) | \
69 IMR(NONFATAL) | \
70 IMR(FATAL) | \
71 IMR(CFG_ERR_POISON) | \
72 IMR(PME_TO_ACK_RCVD) | \
[all …]
/drivers/net/ethernet/realtek/
Datp.c481 write_reg(ioaddr, IMR, ISR_RxOK | ISR_TxErr | ISR_TxOK); in hardware_init()
482 write_reg_high(ioaddr, IMR, ISRh_RxErr); in hardware_init()
567 write_reg(ioaddr, IMR, 0); in atp_send_packet()
568 write_reg_high(ioaddr, IMR, 0); in atp_send_packet()
582 write_reg(ioaddr, IMR, ISR_RxOK | ISR_TxErr | ISR_TxOK); in atp_send_packet()
583 write_reg_high(ioaddr, IMR, ISRh_RxErr); in atp_send_packet()
611 write_reg(ioaddr, IMR, 0); in atp_interrupt()
704 write_reg(ioaddr, IMR, ISR_RxOK | ISR_TxErr | ISR_TxOK); in atp_interrupt()
705 write_reg_high(ioaddr, IMR, ISRh_RxErr); /* Hmmm, really needed? */ in atp_interrupt()
Datp.h40 ISR = 10, IMR = 11, /* Interrupt status and mask. */ enumerator
/drivers/gpu/drm/i915/
Di915_irq.h142 gen3_irq_reset((uncore), type##IMR, type##IIR, type##IER)
158 type##IMR, imr_val, \
/drivers/net/ethernet/natsemi/
Dns83820.c313 #define IMR 0x14 macro
754 writel(dev->IMR_cache, dev->base + IMR); in ns83820_setup_rx()
775 writel(dev->IMR_cache, dev->base + IMR); in ns83820_cleanup_rx()
783 readl(dev->base + IMR); in ns83820_cleanup_rx()
937 writel(dev->IMR_cache, dev->base + IMR);
1375 writel(0, dev->base + IMR);
1426 writel(dev->IMR_cache, dev->base + IMR);
1483 writel(dev->IMR_cache, dev->base + IMR);
1497 writel(dev->IMR_cache, dev->base + IMR);
/drivers/video/fbdev/i810/
Di810_regs.h46 #define IMR 0x020A8 macro
Di810_main.c582 i810_writew(IMR, mmio, par->hw_state.imr); in i810_restore_2d()
660 par->hw_state.imr = i810_readw(IMR, mmio); in i810_save_2d()
/drivers/net/ethernet/
Dfealnx.c168 IMR = 0x38, /* interrupt mask */ enumerator
896 iowrite32(np->imrvalue, ioaddr + IMR); in netdev_open()
1121 iowrite32(0, ioaddr + IMR); in reset_and_disable_rxtx()
1156 iowrite32(np->imrvalue, ioaddr + IMR); in enable_rxtx()
1436 iowrite32(0, ioaddr + IMR); in intr_handler()
1596 iowrite32(np->imrvalue, ioaddr + IMR); in intr_handler()
1896 iowrite32(0x0000, ioaddr + IMR); in netdev_close()
/drivers/video/fbdev/
Di740_reg.h231 #define IMR 0x3034 macro
/drivers/atm/
Dfirestream.h282 #define IMR 0x6c macro
Dfirestream.c1845 write_fs (dev, IMR, 0 in fs_init()
Dzatm.c1350 zout(0xffffffff,IMR); /* enable interrupts */ in zatm_start()
/drivers/net/wireless/realtek/rtl818x/
Drtl818x.h203 __le32 IMR; /* 0x6c - Interrupt mask reg for 8187se */ member
/drivers/net/ethernet/via/
Dvia-velocity.h987 volatile __le32 IMR; member
1152 #define mac_write_int_mask(mask, regs) writel((mask),&((regs)->IMR));
/drivers/video/fbdev/intelfb/
Dintelfbhw.h94 #define IMR 0x20A8 macro
Dintelfbhw.c653 hw->imr = INREG16(IMR); in intelfbhw_read_hw_state()
2052 OUTREG16(IMR, 0); in intelfbhw_enable_irq()
2078 OUTREG16(IMR, 0xffff); in intelfbhw_disable_irq()
/drivers/clocksource/
Dtimer-atmel-tcb.c79 tcb_cache[i].imr = readl(tcaddr + ATMEL_TC_REG(i, IMR)); in tc_clksrc_suspend()
/drivers/char/pcmcia/
Dsynclink_cs.c281 #define IMR 0x3a macro
340 write_reg16(info, CHA + IMR, info->imra_value); in irq_disable()
343 write_reg16(info, CHB + IMR, info->imrb_value); in irq_disable()
350 write_reg16(info, CHA + IMR, info->imra_value); in irq_enable()
353 write_reg16(info, CHB + IMR, info->imrb_value); in irq_enable()
/drivers/gpu/drm/gma500/
Dpsb_intel_reg.h753 #define IMR 0x020a8 macro
/drivers/spi/
Dspi-atmel.c1054 imr = spi_readl(as, IMR); in atmel_spi_pio_interrupt()
1111 imr = spi_readl(as, IMR); in atmel_spi_pdc_interrupt()
/drivers/net/wireless/realtek/rtl818x/rtl8180/
Ddev.c724 rtl818x_iowrite32(priv, &priv->map->IMR, in rtl8180_int_enable()
742 rtl818x_iowrite32(priv, &priv->map->IMR, 0); in rtl8180_int_disable()
/drivers/net/ethernet/cadence/
Dmacb.h1196 unsigned int IMR; member
Dmacb_main.c3086 regs_buff[7] = macb_readl(bp, IMR); in macb_get_regs()
3927 queue->IMR = GEM_IMR(hw_q - 1); in macb_init()
3942 queue->IMR = MACB_IMR; in macb_init()
/drivers/platform/x86/
DKconfig951 Quark contains a set of eight IMR registers and makes use of those