/drivers/pci/controller/ |
D | pcie-xilinx-cpm.c | 60 #define IMR(x) BIT(XILINX_CPM_PCIE_INTR_ ##x) macro 64 IMR(LINK_DOWN) | \ 65 IMR(HOT_RESET) | \ 66 IMR(CFG_PCIE_TIMEOUT) | \ 67 IMR(CFG_TIMEOUT) | \ 68 IMR(CORRECTABLE) | \ 69 IMR(NONFATAL) | \ 70 IMR(FATAL) | \ 71 IMR(CFG_ERR_POISON) | \ 72 IMR(PME_TO_ACK_RCVD) | \ [all …]
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/drivers/net/ethernet/realtek/ |
D | atp.c | 481 write_reg(ioaddr, IMR, ISR_RxOK | ISR_TxErr | ISR_TxOK); in hardware_init() 482 write_reg_high(ioaddr, IMR, ISRh_RxErr); in hardware_init() 567 write_reg(ioaddr, IMR, 0); in atp_send_packet() 568 write_reg_high(ioaddr, IMR, 0); in atp_send_packet() 582 write_reg(ioaddr, IMR, ISR_RxOK | ISR_TxErr | ISR_TxOK); in atp_send_packet() 583 write_reg_high(ioaddr, IMR, ISRh_RxErr); in atp_send_packet() 611 write_reg(ioaddr, IMR, 0); in atp_interrupt() 704 write_reg(ioaddr, IMR, ISR_RxOK | ISR_TxErr | ISR_TxOK); in atp_interrupt() 705 write_reg_high(ioaddr, IMR, ISRh_RxErr); /* Hmmm, really needed? */ in atp_interrupt()
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D | atp.h | 40 ISR = 10, IMR = 11, /* Interrupt status and mask. */ enumerator
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/drivers/gpu/drm/i915/ |
D | i915_irq.h | 142 gen3_irq_reset((uncore), type##IMR, type##IIR, type##IER) 158 type##IMR, imr_val, \
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/drivers/net/ethernet/natsemi/ |
D | ns83820.c | 313 #define IMR 0x14 macro 754 writel(dev->IMR_cache, dev->base + IMR); in ns83820_setup_rx() 775 writel(dev->IMR_cache, dev->base + IMR); in ns83820_cleanup_rx() 783 readl(dev->base + IMR); in ns83820_cleanup_rx() 937 writel(dev->IMR_cache, dev->base + IMR); 1375 writel(0, dev->base + IMR); 1426 writel(dev->IMR_cache, dev->base + IMR); 1483 writel(dev->IMR_cache, dev->base + IMR); 1497 writel(dev->IMR_cache, dev->base + IMR);
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/drivers/video/fbdev/i810/ |
D | i810_regs.h | 46 #define IMR 0x020A8 macro
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D | i810_main.c | 582 i810_writew(IMR, mmio, par->hw_state.imr); in i810_restore_2d() 660 par->hw_state.imr = i810_readw(IMR, mmio); in i810_save_2d()
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/drivers/net/ethernet/ |
D | fealnx.c | 168 IMR = 0x38, /* interrupt mask */ enumerator 896 iowrite32(np->imrvalue, ioaddr + IMR); in netdev_open() 1121 iowrite32(0, ioaddr + IMR); in reset_and_disable_rxtx() 1156 iowrite32(np->imrvalue, ioaddr + IMR); in enable_rxtx() 1436 iowrite32(0, ioaddr + IMR); in intr_handler() 1596 iowrite32(np->imrvalue, ioaddr + IMR); in intr_handler() 1896 iowrite32(0x0000, ioaddr + IMR); in netdev_close()
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/drivers/video/fbdev/ |
D | i740_reg.h | 231 #define IMR 0x3034 macro
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/drivers/atm/ |
D | firestream.h | 282 #define IMR 0x6c macro
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D | firestream.c | 1845 write_fs (dev, IMR, 0 in fs_init()
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D | zatm.c | 1350 zout(0xffffffff,IMR); /* enable interrupts */ in zatm_start()
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/drivers/net/wireless/realtek/rtl818x/ |
D | rtl818x.h | 203 __le32 IMR; /* 0x6c - Interrupt mask reg for 8187se */ member
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/drivers/net/ethernet/via/ |
D | via-velocity.h | 987 volatile __le32 IMR; member 1152 #define mac_write_int_mask(mask, regs) writel((mask),&((regs)->IMR));
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/drivers/video/fbdev/intelfb/ |
D | intelfbhw.h | 94 #define IMR 0x20A8 macro
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D | intelfbhw.c | 653 hw->imr = INREG16(IMR); in intelfbhw_read_hw_state() 2052 OUTREG16(IMR, 0); in intelfbhw_enable_irq() 2078 OUTREG16(IMR, 0xffff); in intelfbhw_disable_irq()
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/drivers/clocksource/ |
D | timer-atmel-tcb.c | 79 tcb_cache[i].imr = readl(tcaddr + ATMEL_TC_REG(i, IMR)); in tc_clksrc_suspend()
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/drivers/char/pcmcia/ |
D | synclink_cs.c | 281 #define IMR 0x3a macro 340 write_reg16(info, CHA + IMR, info->imra_value); in irq_disable() 343 write_reg16(info, CHB + IMR, info->imrb_value); in irq_disable() 350 write_reg16(info, CHA + IMR, info->imra_value); in irq_enable() 353 write_reg16(info, CHB + IMR, info->imrb_value); in irq_enable()
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/drivers/gpu/drm/gma500/ |
D | psb_intel_reg.h | 753 #define IMR 0x020a8 macro
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/drivers/spi/ |
D | spi-atmel.c | 1054 imr = spi_readl(as, IMR); in atmel_spi_pio_interrupt() 1111 imr = spi_readl(as, IMR); in atmel_spi_pdc_interrupt()
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/drivers/net/wireless/realtek/rtl818x/rtl8180/ |
D | dev.c | 724 rtl818x_iowrite32(priv, &priv->map->IMR, in rtl8180_int_enable() 742 rtl818x_iowrite32(priv, &priv->map->IMR, 0); in rtl8180_int_disable()
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/drivers/net/ethernet/cadence/ |
D | macb.h | 1196 unsigned int IMR; member
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D | macb_main.c | 3086 regs_buff[7] = macb_readl(bp, IMR); in macb_get_regs() 3927 queue->IMR = GEM_IMR(hw_q - 1); in macb_init() 3942 queue->IMR = MACB_IMR; in macb_init()
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/drivers/platform/x86/ |
D | Kconfig | 951 Quark contains a set of eight IMR registers and makes use of those
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