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Searched refs:INTR_ENABLE (Results 1 – 6 of 6) sorted by relevance

/drivers/block/
Dswim3.c95 #define INTR_ENABLE 0x01 macro
940 out_8(&sw->control_bis, DRIVE_ENABLE | INTR_ENABLE); in floppy_open()
981 out_8(&sw->control_bic, DRIVE_ENABLE | INTR_ENABLE); in floppy_open()
/drivers/net/ethernet/
Djme.c372 jwrite32(jme, JME_IENS, INTR_ENABLE); in jme_start_irq()
381 jwrite32f(jme, JME_IENC, INTR_ENABLE); in jme_stop_irq()
1498 jwrite32f(jme, JME_IENC, INTR_ENABLE); in jme_intr_msi()
1550 jwrite32f(jme, JME_IENS, INTR_ENABLE); in jme_intr_msi()
1565 if (unlikely((intrstat & INTR_ENABLE) == 0)) in jme_intr()
Djme.h1071 static const u32 INTR_ENABLE = INTR_SWINTR | variable
/drivers/mtd/nand/raw/
Dcadence-nand-controller.c74 #define INTR_ENABLE 0x0114 macro
797 cdns_ctrl->reg + INTR_ENABLE); in cadence_nand_set_irq_mask()
2828 writel_relaxed(INTR_ENABLE_INTR_EN, cdns_ctrl->reg + INTR_ENABLE); in cadence_nand_irq_cleanup()
/drivers/scsi/qla4xxx/
Dql4_fw.h376 #define INTR_ENABLE 1 macro
Dql4_nx.c4099 mbox_cmd[1] = INTR_ENABLE; in qla4_8xxx_intr_enable()