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Searched refs:LUT_RAM_A (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_dpp_cm.c455 mode = LUT_RAM_A; in dpp20_get_blndgam_current()
479 if (current_mode == LUT_BYPASS || current_mode == LUT_RAM_A) in dpp20_program_blnd_lut()
482 next_mode = LUT_RAM_A; in dpp20_program_blnd_lut()
485 dpp20_configure_blnd_lut(dpp_base, next_mode == LUT_RAM_A); in dpp20_program_blnd_lut()
487 if (next_mode == LUT_RAM_A) in dpp20_program_blnd_lut()
496 next_mode == LUT_RAM_A ? 1:2); in dpp20_program_blnd_lut()
548 mode = LUT_RAM_A; in dpp20_get_shaper_current()
891 if (current_mode == LUT_BYPASS || current_mode == LUT_RAM_A) in dpp20_program_shaper()
894 next_mode = LUT_RAM_A; in dpp20_program_shaper()
896 dpp20_configure_shaper_lut(dpp_base, next_mode == LUT_RAM_A); in dpp20_program_shaper()
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Ddcn20_mpc.c310 mode = LUT_RAM_A; in mpc20_get_ogam_current()
425 next_mode == LUT_RAM_A ? 1:2); in apply_DEDCN20_305_wa()
448 if (current_mode == LUT_BYPASS || current_mode == LUT_RAM_A) in mpc2_set_output_gamma()
451 next_mode = LUT_RAM_A; in mpc2_set_output_gamma()
454 mpc20_configure_ogam_lut(mpc, mpcc_id, next_mode == LUT_RAM_A); in mpc2_set_output_gamma()
456 if (next_mode == LUT_RAM_A) in mpc2_set_output_gamma()
467 next_mode == LUT_RAM_A ? 1:2); in mpc2_set_output_gamma()
/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_mpc.c123 mode = LUT_RAM_A; in mpc3_get_ogam_current()
353 next_mode = LUT_RAM_A; in mpc3_set_output_gamma()
354 else if (current_mode == LUT_RAM_A) in mpc3_set_output_gamma()
357 next_mode = LUT_RAM_A; in mpc3_set_output_gamma()
360 mpc3_configure_ogam_lut(mpc, mpcc_id, next_mode == LUT_RAM_A); in mpc3_set_output_gamma()
362 if (next_mode == LUT_RAM_A) in mpc3_set_output_gamma()
372 MPCC_OGAM_SELECT, next_mode == LUT_RAM_A ? 0:1); in mpc3_set_output_gamma()
450 mode = LUT_RAM_A; in mpc3_get_shaper_current()
872 if (current_mode == LUT_BYPASS || current_mode == LUT_RAM_A) in mpc3_program_shaper()
875 next_mode = LUT_RAM_A; in mpc3_program_shaper()
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Ddcn30_dwb_cm.c161 mode = LUT_RAM_A; in dwb3_get_ogam_current()
249 if (current_mode == LUT_BYPASS || current_mode == LUT_RAM_A) in dwb3_program_ogam_lut()
252 next_mode = LUT_RAM_A; in dwb3_program_ogam_lut()
254 dwb3_configure_ogam_lut(dwbc30, next_mode == LUT_RAM_A); in dwb3_program_ogam_lut()
256 if (next_mode == LUT_RAM_A) in dwb3_program_ogam_lut()
264 REG_UPDATE(DWB_OGAM_CONTROL, DWB_OGAM_SELECT, next_mode == LUT_RAM_A ? 0 : 1); in dwb3_program_ogam_lut()
Ddcn30_dpp_cm.c75 mode = LUT_RAM_A; in dpp30_get_gamcor_current()
237 if (current_mode == LUT_BYPASS || current_mode == LUT_RAM_A) in dpp3_program_gamcor_lut()
240 next_mode = LUT_RAM_A; in dpp3_program_gamcor_lut()
243 dpp3_configure_gamcor_lut(dpp_base, next_mode == LUT_RAM_A); in dpp3_program_gamcor_lut()
298 next_mode == LUT_RAM_A); in dpp3_program_gamcor_lut()
301 REG_UPDATE(CM_GAMCOR_CONTROL, CM_GAMCOR_SELECT, next_mode == LUT_RAM_A ? 0:1); in dpp3_program_gamcor_lut()
Ddcn30_dpp.c686 mode = LUT_RAM_A; in dpp3_get_blndgam_current()
713 next_mode = LUT_RAM_A; in dpp3_program_blnd_lut()
718 dpp3_configure_blnd_lut(dpp_base, next_mode == LUT_RAM_A); in dpp3_program_blnd_lut()
720 if (next_mode == LUT_RAM_A) in dpp3_program_blnd_lut()
730 CM_BLNDGAM_SELECT, next_mode == LUT_RAM_A ? 0 : 1); in dpp3_program_blnd_lut()
782 mode = LUT_RAM_A; in dpp3_get_shaper_current()
1131 if (current_mode == LUT_BYPASS || current_mode == LUT_RAM_A) in dpp3_program_shaper()
1134 next_mode = LUT_RAM_A; in dpp3_program_shaper()
1136 dpp3_configure_shaper_lut(dpp_base, next_mode == LUT_RAM_A); in dpp3_program_shaper()
1138 if (next_mode == LUT_RAM_A) in dpp3_program_shaper()
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/drivers/gpu/drm/amd/display/dc/inc/hw/
Dhw_shared.h265 LUT_RAM_A, enumerator