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Searched refs:MASTER_COMM_DATA_REG3 (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dce/
Ddce_dmcu.h40 SR(MASTER_COMM_DATA_REG3), \
62 SR(MASTER_COMM_DATA_REG3), \
79 SR(MASTER_COMM_DATA_REG3), \
217 uint32_t MASTER_COMM_DATA_REG3; member
Ddce_dmcu.c272 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG3), in dce_dmcu_setup_psr()
427 REG_WRITE(MASTER_COMM_DATA_REG3, tx_interrupt_mask); in dcn10_dmcu_init()
711 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG3), in dcn10_dmcu_setup_psr()
849 REG_WRITE(MASTER_COMM_DATA_REG3, data2); in dcn10_send_edid_cea()
969 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG3), in dcn10_forward_crc_window()
Ddce_link_encoder.h150 uint32_t MASTER_COMM_DATA_REG3; member