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Searched refs:MP1_BASE__INST0_SEG0 (Results 1 – 14 of 14) sorted by relevance

/drivers/gpu/drm/amd/include/
Dcyan_skillfish_ip_offset.h461 #define MP1_BASE__INST0_SEG0 0x00016000 macro
Dnavi10_ip_offset.h519 #define MP1_BASE__INST0_SEG0 0x00016000 macro
Dvega20_ip_offset.h546 #define MP1_BASE__INST0_SEG0 0x00016000 macro
Dnavi12_ip_offset.h699 #define MP1_BASE__INST0_SEG0 0x00016200 macro
Ddimgrey_cavefish_ip_offset.h706 #define MP1_BASE__INST0_SEG0 0x00016200 macro
Dnavi14_ip_offset.h699 #define MP1_BASE__INST0_SEG0 0x00016000 macro
Dsienna_cichlid_ip_offset.h706 #define MP1_BASE__INST0_SEG0 0x00016000 macro
Dbeige_goby_ip_offset.h833 #define MP1_BASE__INST0_SEG0 0x00016000 macro
Drenoir_ip_offset.h949 #define MP1_BASE__INST0_SEG0 0x00016200 macro
Dvega10_ip_offset.h365 #define MP1_BASE__INST0_SEG0 0x00016200 macro
Dyellow_carp_offset.h876 #define MP1_BASE__INST0_SEG0 0x00016000 macro
Dvangogh_ip_offset.h956 #define MP1_BASE__INST0_SEG0 0x00016000 macro
Darct_ip_offset.h694 #define MP1_BASE__INST0_SEG0 0x00012020 macro
Daldebaran_ip_offset.h1003 #define MP1_BASE__INST0_SEG0 0x00016000 macro